Ejemplo n.º 1
0
Archivo: run.py Proyecto: felixn/vunit
def main():
    vhdl_2019 = getenv("VUNIT_VHDL_STANDARD") == "2019"
    root = Path(__file__).parent

    ui = VUnit.from_argv()

    vunit_lib = ui.library("vunit_lib")
    files = glob.glob(str(root / "test" / "*.vhd"))
    files.remove(str(root / "test" / "tb_location.vhd"))
    vunit_lib.add_source_files(files)

    preprocessor = location_preprocessor.LocationPreprocessor()
    preprocessor.add_subprogram("print_pre_vhdl_2019_style")
    preprocessor.remove_subprogram("info")
    vunit_lib.add_source_files(root / "test" / "tb_location.vhd",
                               preprocessors=[preprocessor])

    if vhdl_2019:
        testbenches = vunit_lib.get_source_files("*tb*")
        testbenches.set_compile_option("rivierapro.vcom_flags", ["-dbg"])
        ui.set_sim_option("rivierapro.vsim_flags", ["-filter RUNTIME_0375"])

    vunit_lib.test_bench("tb_location").set_generic("vhdl_2019", vhdl_2019)

    ui.main()
Ejemplo n.º 2
0
Archivo: run.py Proyecto: suoto/hdl_lib
def main():
    ui = VUnit.from_argv()
    ui.add_osvvm()
    ui.enable_location_preprocessing()
    #  ui.add_com()
    ui.disable_ieee_warnings()

    root = dirname(__file__)

    for library_name in ('common_lib', 'memory'):
        ui.add_library(library_name).add_source_files(
            join(root, library_name, 'src', '*.vhd'))

    ui.add_library('str_format').add_source_files(
        join(root, 'hdl_string_format', 'src', '*.vhd'))

    ui.add_library('memory_tb').add_source_files(
        join(root, 'memory', 'test', 'async_fifo_tb.vhd'))

    ui.add_library('exp_golomb').add_source_files(
        join(root, 'exponential_golomb', 'src', '*.vhd'))

    #  ui.add_library('exp_golomb_tb').add_source_files(
    #      join(root, 'exponential_golomb', 'test', '*.vhd'))

    add_async_fifo_tests(ui.library('memory_tb').entity('async_fifo_tb'))

    ui.set_compile_option('modelsim.vcom_flags', ['-novopt', '-explicit'])
    ui.set_sim_option('modelsim.vsim_flags', ['-novopt'])
    ui.main()
Ejemplo n.º 3
0
        def run(value):
            """
            Utility function to first run with pkg_body1 then pkg_body2
            """

            dpath = Path(self.data_path)

            tb_pkg_file_name = str(dpath / "tb_pkg.vhd")
            pkg_file_name = str(dpath / "pkg.vhd")
            pkg_body_file_name = str(dpath / ("pkg_body%i.vhd" % value))

            argv = ["--output-path=%s" % self.output_path, "-v"]
            if value == 1:
                argv.append("--clean")

            ui = VUnit.from_argv(argv=argv)
            lib = ui.add_library("lib")
            lib.add_source_files(tb_pkg_file_name)
            lib.add_source_files(pkg_file_name)
            lib.add_source_files(pkg_body_file_name)
            lib.entity("tb_pkg").set_generic("value", value)

            try:
                ui.main()
            except SystemExit as ex:
                self.assertEqual(ex.code, 0)
Ejemplo n.º 4
0
        def run(value):
            """
            Utility function to first run with pkg_body1 then pkg_body2
            """

            tb_pkg_file_name = join(self.data_path, "tb_pkg.vhd")
            pkg_file_name = join(self.data_path, "pkg.vhd")
            pkg_body_file_name = join(self.data_path, "pkg_body%i.vhd" % value)

            argv = ["--output-path=%s" % self.output_path,
                    "-v"]
            if value == 1:
                argv.append("--clean")

            ui = VUnit.from_argv(argv=argv)
            lib = ui.add_library("lib")
            lib.add_source_files(tb_pkg_file_name)
            lib.add_source_files(pkg_file_name)
            lib.add_source_files(pkg_body_file_name)
            lib.entity("tb_pkg").set_generic("value", value)

            try:
                ui.main()
            except SystemExit as ex:
                self.assertEqual(ex.code, 0)
Ejemplo n.º 5
0
def test_binary_tree():
    # FIXME: Why does commented out lines not work.
    #args = VUnitCLI().parse_args(argv=sys.argv)
    #vu = VUnit.from_args(args)
    vu = VUnit.from_argv()
    lib_name = 'lib'
    lib = vu.add_library(lib_name)
    vu._builtins._add_osvvm()
    # vu._builtins._add_data_types()
    # vu._builtins.add_vhdl_builtins()

    add_cores_roots([binary_tree.thisdir])
    work_root = 'fusesoc_generators_test_work_directory'
    os.mkdir(work_root)
    filenames = get_filenames_from_core(
        work_root=work_root,
        top_core_name='binary_tree',
        top_entity_name='binary_tree',
        generic_sets=[{
            'width': 3,
            'n_inputs': 7,
            'meta_width': 4,
            'operation': 'binary_minimum',
            'pipeline': 0,
        }],
        top_params={},
    )
    filenames.append(os.path.join(binary_tree.thisdir, 'binary_tree_tb.vhd'))
    lib.add_source_files(filenames)
    vu.main()
Ejemplo n.º 6
0
 def __init__(self):
     # config
     self.cli = VUnitCLI()
     self.args = self.cli.parse_args()
     self.args.num_threads = 4
     self.ui = VUnit.from_args(self.args)
     self.lib = self.ui.add_library("lib")
Ejemplo n.º 7
0
def setup_vunit(argv=None):
    '''
    Sets up vunit logging and returns the VUnit object.
    '''
    args = VUnitCLI().parse_args(argv=argv)
    log_level = args.log_level
    vu = VUnit.from_args(args)
    vu.log_level = getattr(logging, log_level.upper())
    return vu
Ejemplo n.º 8
0
 def __init__(self):
     # config
     self.cli = VUnitCLI()
     self.args = self.cli.parse_args()
     self.args.gtkwave_fmt = 'vcd'
     self.args.num_threads = 4
     #self.args.log_level = 'info'
     self.ui = VUnit.from_args(self.args)
     self.lib = self.ui.add_library("lib")
Ejemplo n.º 9
0
def testeVHDL(root):
	ui = VUnit.from_argv()
	lib = ui.add_library("lib")
	lib.add_source_files(join(root, "..","Computador","Modulos","PortasLogicas", "*.vhd"))  # source
	lib.add_source_files(join(root, "..","Computador","Modulos","UnidadeLogicaAritmetica", "*.vhd"))  # source
	lib.add_source_files(join(root, "..","Computador","Modulos","CircuitosSequenciais", "*.vhd"))   # source
	lib.add_source_files(join(root, "..","Computador","Modulos","CPU", "*.vhd"))   # source
	lib.add_source_files(join(root, "..","Computador","Testes","PortasLogicas", "*.vhd"))   # test
	lib.add_source_files(join(root, "..","Computador","Testes","UnidadeLogicaAritmetica", "*.vhd"))   # test
	lib.add_source_files(join(root, "..","Computador","Testes","CircuitosSequenciais", "*.vhd"))   # test
	lib.add_source_files(join(root, "..","Computador","Testes","CPU", "*.vhd"))   # test
	ui.main()
Ejemplo n.º 10
0
def run_test():
    # Create VUnit instance by parsing command line arguments
    vu = VUnit.from_argv()

    # Create library 'lib'
    lib = vu.add_library("lib")

    files = (
        'vhdl_type_pkg.vhd',
        'dummy.vhd',
    )
    directory = 'deleteme'
    os.makedirs(directory)
    generated_fns, entity = filetestbench_generator.prepare_files(
        directory, files, 'dummy')

    # Add all files ending in .vhd in current working directory to library
    lib.add_source_files(generated_fns)
    lib.add_source_files('../vhdl/*.vhd')
    lib.add_source_files('*.vhd')

    datainfilename = os.path.join(directory, 'indata.das')
    dataoutfilename = os.path.join(directory, 'outdata.das')
    generics = {'length': 3}

    test = DummyTest(entity, generics)
    i_data = test.make_input_data()
    lines = [entity.inputs_to_slv(line, generics=generics) for line in i_data]
    with open(datainfilename, 'w') as f:
        f.write('\n'.join(lines))

    def post_check(directory):
        with open(dataoutfilename, 'r') as f:
            lines = f.readlines()
        o_data = [
            entity.outputs_from_slv(line, generics=generics) for line in lines
        ]
        test.check_output_data(i_data, o_data)
        return True

    tb_generated = lib.entity('dummy_tb')
    tb_generated.add_config(
        name="bug",
        generics={
            'datainfilename': datainfilename,
            'dataoutfilename': dataoutfilename,
            'length': 5,
        },
        post_check=post_check,
    )
    # Run vunit function
    vu.main()
Ejemplo n.º 11
0
def run_with_compile_errors(ui, args, vhdl_standard):
    def match(name, patterns):
        return reduce(
            lambda found_match, pattern: found_match | fnmatch(name, pattern),
            patterns,
            False,
        )

    # Run all tests in isolation to handle failure to compile
    args.minimal = True
    original_test_patterns = args.test_patterns
    test_report = TestReport()
    n_tests = 0
    testbenches = (ui.library("vhdl_2008").get_test_benches() +
                   ui.library("vhdl_2019").get_test_benches())
    total_start_time = ostools.get_time()
    for tb in testbenches:
        tests = tb.get_tests()
        if not tests:
            test_names = ["all"]
        else:
            test_names = [test.name for test in tests]

        for test_name in test_names:
            full_test_name = "%s.%s.%s" % (tb.library.name, tb.name, test_name)
            if not match(full_test_name, original_test_patterns):
                continue

            test_start_time = ostools.get_time()
            n_tests += 1
            args.test_patterns = [full_test_name]
            ui = VUnit.from_args(args, vhdl_standard=vhdl_standard)
            vhdl_2008 = ui.add_library("vhdl_2008")
            vhdl_2019 = ui.add_library("vhdl_2019")
            vhdl_2008.add_source_files(join(root, "vhdl_2008", "*.vhd"))
            vhdl_2019.add_source_files(join(root, "vhdl_2019", "*.vhd"))

            try:
                ui.main()
            except SystemExit as ex:
                tb_time = ostools.get_time() - test_start_time
                if ex.code == 0:
                    test_report.add_result(full_test_name, PASSED, tb_time,
                                           None)
                else:
                    test_report.add_result(full_test_name, FAILED, tb_time,
                                           None)

    print("\nCompliance test completed:\n")
    test_report.set_expected_num_tests(n_tests)
    test_report.set_real_total_time(ostools.get_time() - total_start_time)
    test_report.print_str()
Ejemplo n.º 12
0
def run():
    ui = VUnit.from_argv()
    # ui.add_osvvm()

    src_path = join(dirname(__file__), "vhdl_files")

    src_lib = ui.add_library("src_lib")
    src_lib.add_source_files(join(src_path, "src", "*.vhd"))

    test_lib = ui.add_library("test_lib")
    test_lib.add_source_files(join(src_path, "test", "*.vhd"))

    ui.main()
Ejemplo n.º 13
0
Archivo: run.py Proyecto: mrisc32/mc1
def main():
    # Create VUnit instance by parsing command line arguments
    vu = VUnit.from_argv()

    # Create library 'lib' containing all the test benches...
    lib = vu.add_library("lib")
    lib.add_source_files("test/*_tb.vhd")

    # Add the MC1 design.
    lib.add_source_files("rtl/dither.vhd")
    lib.add_source_files("rtl/mc1.vhd")
    lib.add_source_files("rtl/mmio_types.vhd")
    lib.add_source_files("rtl/mmio.vhd")
    lib.add_source_files("rtl/prng.vhd")
    lib.add_source_files("rtl/ram_true_dual_port.vhd")
    lib.add_source_files("rtl/reset_conditioner.vhd")
    lib.add_source_files("rtl/reset_stabilizer.vhd")
    lib.add_source_files("rtl/synchronizer.vhd")
    lib.add_source_files("rtl/vid_blend.vhd")
    lib.add_source_files("rtl/video_layer.vhd")
    lib.add_source_files("rtl/video.vhd")
    lib.add_source_files("rtl/vid_palette.vhd")
    lib.add_source_files("rtl/vid_pixel.vhd")
    lib.add_source_files("rtl/vid_pix_prefetch.vhd")
    lib.add_source_files("rtl/vid_raster.vhd")
    lib.add_source_files("rtl/vid_regs.vhd")
    lib.add_source_files("rtl/vid_types.vhd")
    lib.add_source_files("rtl/vid_vcpp_stack.vhd")
    lib.add_source_files("rtl/vid_vcpp.vhd")
    lib.add_source_files("rtl/vram.vhd")
    lib.add_source_files("rtl/wb_crossbar_2x4.vhd")

    # Add the MC1 boot ROM (must be generated with "make").
    lib.add_source_files("rom/out/rom.vhd")

    # Add the MRISC32-A1 implementation.
    mrisc32 = vu.add_library("mrisc32")
    mrisc32.add_source_files("mrisc32-a1/rtl/agu/*.vhd")
    mrisc32.add_source_files("mrisc32-a1/rtl/alu/*.vhd")
    mrisc32.add_source_files("mrisc32-a1/rtl/common/*.vhd")
    mrisc32.add_source_files("mrisc32-a1/rtl/core/*.vhd")
    mrisc32.add_source_files("mrisc32-a1/rtl/fpu/*.vhd")
    mrisc32.add_source_files("mrisc32-a1/rtl/muldiv/*.vhd")
    mrisc32.add_source_files("mrisc32-a1/rtl/pipeline/*.vhd")
    mrisc32.add_source_files("mrisc32-a1/rtl/sau/*.vhd")

    # Bake the video_tb test data.
    bake_video_tb_vram()

    # Run vunit function
    vu.main()
Ejemplo n.º 14
0
def main():

    # VUnit steals the command line args so we use an environment variable
    # to determine which core we're picking up
    toplevel = os.getenv("CORE", "")
    if not toplevel:
        sys.stderr.write("Need to provide CORE environment variable")
        sys.exit(1)

    # Create VUnit instance by parsing command line arguments
    vu = VUnit.from_argv()

    #Create singleton instances for core manager and configuration handler
    #Configuration manager is not needed in this example
    cm = CoreManager()

    # Assume we're running in the same directory containing the cores
    cm.add_cores_root(".")

    #Get the sorted list of dependencies starting from the top-level core
    try:
        cores = cm.get_depends(toplevel)
    except DependencyError as e:
        print("'{}' or any of its dependencies requires '{}', but this core was not found".format(top_core, e.value))
        sys.exit(2)

    #Iterate over cores, filesets and files and add all relevant sources files to vunit
    incdirs = set()
    src_files = []

    #'usage' is a list of tags to look for in the filesets.
    # Only look at filesets where any of these tags are present
    usage = ['sim']
    for core_name in cores:
        core = cm.get_core(core_name)
        core.setup()
        basepath = core.files_root
        for fs in core.file_sets:
            if (set(fs.usage) & set(usage)) and ((core_name == toplevel) or not fs.private):
                for file in fs.file:
                    if file.is_include_file:
                        #TODO: incdirs not used right now
                        incdirs.add(os.path.join(basepath, os.path.dirname(file.name)))
                    else:
                        try:
                            vu.library(file.logical_name)
                        except KeyError:
                            vu.add_library(file.logical_name)
                        vu.add_source_file(os.path.join(basepath, file.name), file.logical_name)
    # Run vunit function
    vu.main()
Ejemplo n.º 15
0
def main():
    ui = VUnit.from_argv()
    ui.enable_location_preprocessing()

    src_path = join(dirname(__file__), "src")

    str_format = ui.add_library("str_format")
    str_format.add_source_files(join(src_path, "*.vhd"))

    str_format_tb = ui.add_library("str_format_tb")
    str_format_tb.add_source_files(join(src_path, "test", "*.vhd"))

    ui.set_compile_option('modelsim.vcom_flags', ['-novopt', '-explicit'])
    ui.set_sim_option('modelsim.vsim_flags', ['-novopt'])
    ui.main()
Ejemplo n.º 16
0
Archivo: run.py Proyecto: suoto/hdl_lib
def main():
    ui = VUnit.from_argv()
    ui.add_osvvm()

    root_path = dirname(__file__)

    exp_golomb = ui.add_library("exp_golomb")
    exp_golomb.add_source_files(join(root_path, "src", "*.vhd"))

    exp_golomb_tb = ui.add_library("exp_golomb_tb")
    exp_golomb_tb.add_source_files(join(root_path, "test", "*.vhd"))

    ui.set_compile_option('modelsim.vcom_flags', ['-novopt', '-explicit'])
    ui.set_sim_option('modelsim.vsim_flags', ['-novopt'])
    ui.main()
Ejemplo n.º 17
0
def main():
    cli = VUnit.from_argv()
    cli.add_osvvm()
    cli.enable_location_preprocessing()
    cli.add_com()

    cli.add_library("fpga_cores").add_source_files(p.join(
        ROOT, "src", "*.vhd"))

    cli.add_library("str_format").add_source_files(
        p.join(ROOT, "dependencies", "hdl_string_format", "src", "*.vhd"))

    cli.add_library("tb")
    cli.library("tb").add_source_files(p.join(ROOT, "testbench", "*.vhd"))

    cli.add_library("fpga_cores_sim")
    cli.library("fpga_cores_sim").add_source_files(p.join(
        ROOT, "sim", "*.vhd"))

    cli.add_library("exp_golomb").add_source_files(
        p.join(ROOT, "src", "exponential_golomb", "*.vhd"))

    addTests(cli)

    cli.set_compile_option("modelsim.vcom_flags", ["-explicit"])

    # Not all options are supported by all GHDL backends
    #  cli.set_compile_option("ghdl.flags", ["-frelaxed-rules"])
    #  cli.set_compile_option("ghdl.flags", ["-frelaxed-rules", "-O0", "-g"])
    cli.set_compile_option("ghdl.flags", ["-frelaxed-rules", "-O2", "-g"])

    # Make components not bound (error 3473) an error
    cli.set_sim_option("modelsim.vsim_flags",
                       ["-error", "3473", '-voptargs="+acc=n"'])
    #  cli.set_sim_option("ghdl.sim_flags", ["-frelaxed-rules"])
    #  cli.set_sim_option("ghdl.elab_e", ["-frelaxed-rules"])
    cli.set_sim_option("ghdl.elab_flags", ["-frelaxed-rules"])

    cli.set_sim_option("disable_ieee_warnings", True)
    cli.set_sim_option("modelsim.init_file.gui", p.join(ROOT, "wave.do"))
    cli.main()
Ejemplo n.º 18
0
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this file,
# You can obtain one at http://mozilla.org/MPL/2.0/.
#
# Copyright (c) 2015, Lars Asplund [email protected]

from os.path import join, dirname, basename
from vunit import VUnit
from vunit.check_preprocessor import CheckPreprocessor
from glob import glob

vhdl_path = join(dirname(__file__), "test")
ui = VUnit.from_argv(compile_builtins=False)
ui.add_builtins('vunit_lib', mock_log=True)
lib = ui.add_library('lib')
lib.add_source_files(join(vhdl_path, "test_support.vhd"))

if ui.vhdl_standard in ('2002', '2008'):
    lib.add_source_files(join(vhdl_path, "test_count.vhd"))
    lib.add_source_files(join(vhdl_path, "test_types.vhd"))
elif ui.vhdl_standard == '93':
    lib.add_source_files(join(vhdl_path, "test_count93.vhd"))

if ui.vhdl_standard == '2008':
    lib.add_source_files(join(vhdl_path, "tb_check_relation.vhd"), [CheckPreprocessor()])
else:
    lib.add_source_files(join(vhdl_path, "tb_check_relation93_2002.vhd"), [CheckPreprocessor()])

for file_name in glob(join(vhdl_path, "tb_*.vhd")):
    if basename(file_name) == "tb_check_relation.vhd":
        continue
Ejemplo n.º 19
0
Archivo: run.py Proyecto: cm8f/hdl-base
                    depth_b = int(depth_a * width_a / width_b)
                    for reg in oreg:
                        # due to memory model limitation
                        if not (width_a == 32 and width_b == 32):
                            test.add_config(
                                name=
                                "deptha=%d,depthb=%d,widtha=%d,widthb=%d,reg=%s"
                                % (depth_a, depth_b, width_a, width_b, reg),
                                generics=dict(g_width_a=width_a,
                                              g_width_b=width_b,
                                              g_depth_a=depth_a,
                                              g_depth_b=depth_b,
                                              g_register=reg))


if __name__ == "__main__":
    cli = VUnitCLI()
    cli.parser.add_argument('--cover',
                            type=int,
                            default=0,
                            help='Enable ghdl coverage')
    args = cli.parse_args()

    VU = VUnit.from_args(args=args)
    VU.add_osvvm()
    create_test_suite(VU, args)
    if args.cover < 1:
        VU.main()
    else:
        VU.main(post_run=post_run)
Ejemplo n.º 20
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    report = results.get_report()
    cosim_args_dir = Path(report.output_path) / "cosim"
    try:
        makedirs(str(cosim_args_dir))
    except FileExistsError:
        pass
    for key, item in report.tests.items():
        copyfile(
            str(Path(item.path) / "ghdl" / "args.json"),
            str(cosim_args_dir /
                ("%s.json" % re.search(r"lib\.(.+)\.all", key)[1])),
        )


ROOT = Path(__file__).resolve().parent

vu = VUnit.from_argv(vhdl_standard=getenv('VUNIT_VHDL_STANDARD', '2008'))

lib = vu.add_library('lib').add_source_files(str(ROOT / 'tb.vhd'))

vu.set_sim_option('ghdl.elab_flags', [
    '-shared', '-Wl,-fPIC',
    '-Wl,' + str(ROOT.parent.parent.parent / 'quickstart' / 'wrapping' /
                 'exitcb' / 'caux.c')
])

vu.set_sim_option("ghdl.elab_e", True)
vu._args.elaborate = True

vu.main(post_run=post_func)
Ejemplo n.º 21
0
 def main(self, vu: VUnit):
     """override this for final parametrization of the :class:`VUnit` instance, or for custom invokation of VUnit"""
     vu.main()
Ejemplo n.º 22
0
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this file,
# You can obtain one at http://mozilla.org/MPL/2.0/.
#
# Copyright (c) 2014-2015, Lars Asplund [email protected]

from os.path import join, dirname
from vunit import VUnit

root = dirname(__file__)
ui = VUnit.from_argv()
lib = ui.add_library("lib")
lib.add_source_files(join(root, "test", "*.vhd"))
ui.main()
Ejemplo n.º 23
0
def create_project(root, args):
    """
    Create VUnit project
    """
    prj = VUnit.from_args(args)

    if not args.vendor_verification:
        prj.add_preprocessor(IEEEPreprocessor())

    prj.enable_check_preprocessing()

    new_ieee = prj.add_library("new_ieee")
    if not args.vendor_verification:
        new_ieee.add_source_files(str(root / "../ieee/*.vhdl"))
    new_ieee.add_source_files(str(root / "*.vhdl"))

    # Work around pending VUnit dependency scanning updates
    test_fixed = new_ieee.get_source_files("*test_fixed.vhdl")
    test_fixed2 = new_ieee.get_source_files("*test_fixed2.vhdl")
    test_fixed3 = new_ieee.get_source_files("*test_fixed3.vhdl")
    test_fixed_nr = new_ieee.get_source_files("*test_fixed_nr.vhdl")
    test_fphdl = new_ieee.get_source_files("*test_fphdl.vhdl")
    test_fphdl16 = new_ieee.get_source_files("*test_fphdl16.vhdl")
    test_fphdl64 = new_ieee.get_source_files("*test_fphdl64.vhdl")
    test_fphdl128 = new_ieee.get_source_files("*test_fphdl128.vhdl")
    test_fphdlbase = new_ieee.get_source_files("*test_fphdlbase.vhdl")
    test_fpfixed = new_ieee.get_source_files("*test_fpfixed.vhdl")
    test_fp32 = new_ieee.get_source_files("*test_fp32.vhdl")
    fixed_noround_pkg = new_ieee.get_source_files("*fixed_noround_pkg.vhdl")
    float_roundneg_pkg = new_ieee.get_source_files("*float_roundneg_pkg.vhdl")
    float_noround_pkg = new_ieee.get_source_files("*float_noround_pkg.vhdl")

    if not args.vendor_verification:
        fixed_pkg = new_ieee.get_source_files("*fixed_pkg.vhdl")
        float_pkg = new_ieee.get_source_files("*float_pkg.vhdl")
        fixed_generic_pkg_body = new_ieee.get_source_files(
            "*fixed_generic_pkg-body.vhdl")
        float_generic_pkg = new_ieee.get_source_files(
            "*float_generic_pkg.vhdl")
        float_generic_pkg_body = new_ieee.get_source_files(
            "*float_generic_pkg-body.vhdl")

    if not args.vendor_verification:
        float_pkg.add_dependency_on(fixed_pkg)
        float_pkg.add_dependency_on(float_generic_pkg_body)
        fixed_pkg.add_dependency_on(fixed_generic_pkg_body)
        float_generic_pkg.add_dependency_on(fixed_pkg)
        test_fixed.add_dependency_on(fixed_pkg)
        test_fixed2.add_dependency_on(fixed_pkg)
        test_fixed3.add_dependency_on(fixed_pkg)
        test_fphdlbase.add_dependency_on(fixed_pkg)
        test_fpfixed.add_dependency_on(fixed_pkg)
        test_fp32.add_dependency_on(fixed_pkg)
        test_fphdl64.add_dependency_on(float_pkg)
        test_fphdl128.add_dependency_on(float_pkg)
        test_fphdlbase.add_dependency_on(float_pkg)
        test_fpfixed.add_dependency_on(float_pkg)
        test_fp32.add_dependency_on(float_pkg)
        float_roundneg_pkg.add_dependency_on(float_generic_pkg_body)
        float_noround_pkg.add_dependency_on(float_generic_pkg_body)
        fixed_noround_pkg.add_dependency_on(fixed_generic_pkg_body)

    test_fphdl.add_dependency_on(float_roundneg_pkg)
    test_fphdl16.add_dependency_on(float_noround_pkg)
    test_fixed_nr.add_dependency_on(fixed_noround_pkg)

    prj.set_sim_option("vhdl_assert_stop_level", "warning")
    for testbench in new_ieee.get_test_benches():
        for test_case in testbench.get_tests():
            if test_case.name.startswith("Expected to warn"):
                levels = ["warning", "error"]
            elif test_case.name.startswith("Expected to fail"):
                levels = ["error", "failure"]
            else:
                levels = []

            for level in levels:
                sim_options = dict(vhdl_assert_stop_level=level)
                test_case.add_config(name="stop@%s" % level,
                                     sim_options=sim_options)

    return prj
Ejemplo n.º 24
0
Archivo: run.py Proyecto: barri/vunit
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this file,
# You can obtain one at http://mozilla.org/MPL/2.0/.
#
# Copyright (c) 2014-2018, Lars Asplund [email protected]

from os.path import join, dirname
from vunit import VUnit

root = dirname(__file__)

prj = VUnit.from_argv()
prj.add_com()
tb_com_lib = prj.add_library("tb_com_lib")
tb_com_lib.add_source_files(join(root, 'test', '*.vhd'))
pkg = tb_com_lib.package('custom_types_pkg')
pkg.generate_codecs(codec_package_name='custom_codec_pkg', used_packages=['ieee.std_logic_1164', 'constants_pkg',
                                                                          'tb_com_lib.more_constants_pkg'])
prj.main()
Ejemplo n.º 25
0
Archivo: run.py Proyecto: zggl/vunit
for val in [["int32_t", c_iobj], ["uint8_t", c_bobj]]:
    print(
        popen(" ".join([
            "gcc",
            "-fPIC",
            "-DTYPE=" + val[0],
            "-I",
            ext_srcs,
            "-c",
            join(src_path, "main.c"),
            "-o",
            val[1],
        ])).read())

# Enable the external feature for strings/byte_vectors and integer_vectors
vu = VUnit.from_argv(vhdl_standard="2008", compile_builtins=False)
vu.add_builtins({"string": True, "integer": True})

lib = vu.add_library("lib")
lib.add_source_files(join(src_path, "tb_ext_*.vhd"))

# Add the C object to the elaboration of GHDL
for tb in lib.get_test_benches(pattern="*tb_ext*", allow_empty=False):
    tb.set_sim_option(
        "ghdl.elab_flags",
        [
            "-Wl," + c_bobj,
            "-Wl,-Wl,--version-script=" + join(ext_srcs, "grt.ver")
        ],
        overwrite=True,
    )
Ejemplo n.º 26
0
#  -------

from vunit import VUnit, VUnitCLI

root = dirname(__file__)

# These lines add the option to specify the Bitvis Utility Library root directory
# from the command line (python run.py -b <path to my BVUL root>). They
# can be replaced by a single line, ui = VUnit.from_argv(), if you assign the root
# directory to the bvul_root variable directly
cli = VUnitCLI()
cli.parser.add_argument('-b', '--bvul-root',
                        required=True,
                        help='Bitvis Utility Library root directory')
args = cli.parse_args()
ui = VUnit.from_args(args)
# ------

# Create VHDL libraries and add the related BVUL files to these
bvul_root = args.bvul_root

bvul_lib = ui.add_library('bitvis_util')
bvul_lib.add_source_files(join(bvul_root, 'bitvis_util', 'src2008', '*.vhd'))

bitvis_vip_spi_lib = ui.add_library('bitvis_vip_sbi')
bitvis_vip_spi_lib.add_source_files(join(bvul_root, 'bitvis_vip_sbi', 'src', '*.vhd'))

# Add all testbenches to lib
lib = ui.add_library('lib')
lib.add_source_files(join(root, 'test', '*.vhd'))
Ejemplo n.º 27
0
from os.path import join, dirname
from vunit import VUnit, VUnitCLI
from vunit.simulator_factory import SIMULATOR_FACTORY
from run_support import run_with_compile_errors

root = dirname(__file__)

vhdl_standard = ("2019" if SIMULATOR_FACTORY.select_simulator().name
                 == "rivierapro" else "2008")

args = VUnitCLI().parse_args()

# keep_going is a planned VUnit feature which adds support for dealing with testbenches
# that don't compile
if "keep_going" in args:
    args.keep_going = True

ui = VUnit.from_args(args, vhdl_standard=vhdl_standard)
vhdl_2008 = ui.add_library("vhdl_2008")
vhdl_2019 = ui.add_library("vhdl_2019")
vhdl_2008.add_source_files(join(root, "vhdl_2008", "*.vhd"))
vhdl_2019.add_source_files(join(root, "vhdl_2019", "*.vhd"))

if "keep_going" in args:
    ui.main()
else:
    # Workaround while keep_going isn't supported
    run_with_compile_errors(ui, args, vhdl_standard)
Ejemplo n.º 28
0
from pathlib import Path
from subprocess import check_call
from vunit import VUnit

SRC = Path(__file__).parent.resolve() / "runACircuit"

VU = VUnit.from_argv(vhdl_standard="2008")

VU.add_library("lib").add_source_files(SRC / "*.vhd")

VU.set_sim_option("ghdl.elab_flags", [
    "-Wl,-I%s" % SRC.parent.parent.parent, "-Wl," + str(SRC / "main.c"),
    "-Wl,-lxycecinterface"
])

VU.main()
Ejemplo n.º 29
0
def main():
    "Main entry point for DVB FPGA test runner"

    _generateGnuRadioData()

    cli = VUnit.from_argv()
    cli.add_osvvm()
    cli.add_com()
    cli.enable_location_preprocessing()

    library = cli.add_library("lib")
    library.add_source_files(p.join(ROOT, "rtl", "*.vhd"))
    library.add_source_files(p.join(ROOT, "rtl", "bch_generated", "*.vhd"))

    library.add_source_files(p.join(ROOT, "testbench", "*.vhd"))
    library.add_source_files(p.join(ROOT, "testbench", "*", "*.vhd"))

    cli.add_library("str_format").add_source_files(
        p.join(ROOT, "third_party", "hdl_string_format", "src", "*.vhd")
    )

    addAllConfigsTest(
        entity=cli.library("lib").entity("axi_bch_encoder_tb"),
        configs=TEST_CONFIGS,
        input_file_basename="bch_encoder_input.bin",
        reference_file_basename="ldpc_encoder_input.bin",
    )

    addAllConfigsTest(
        entity=cli.library("lib").entity("axi_baseband_scrambler_tb"),
        configs=TEST_CONFIGS,
        input_file_basename="bb_scrambler_input.bin",
        reference_file_basename="bch_encoder_input.bin",
    )

    # Uncomment this to test configs individually
    #  # BCH encoding doesn't depend on the constellation type, choose any
    #  for config in _getAllConfigs(constellations=(ConstellationType.MOD_8PSK,)):
    #      cli.library("lib").entity("axi_bch_encoder_tb").add_config(
    #          name=config.name,
    #          generics=dict(
    #              test_cfg=config.getTestConfig(
    #                  input_file_path="bch_encoder_input.bin",
    #                  reference_file_path="ldpc_encoder_input.bin",
    #              ),
    #              NUMBER_OF_TEST_FRAMES=8,
    #          ),
    #      )

    for data_width in (1, 8):
        all_configs = []
        for config in _getAllConfigs():
            all_configs += [
                config.getTestConfig(
                    input_file_path="bit_interleaver_input.bin",
                    reference_file_path="bit_interleaver_output.bin",
                )
            ]

            # Uncomment this to test configs individually
            #  cli.library("lib").entity("axi_bit_interleaver_tb").add_config(
            #      name=f"data_width={data_width},{config.name}",
            #      generics=dict(
            #          DATA_WIDTH=data_width,
            #          test_cfg=config.getTestConfig(
            #              input_file_path="bit_interleaver_input.bin",
            #              reference_file_path="bit_interleaver_output.bin",
            #          ),
            #          NUMBER_OF_TEST_FRAMES=8,
            #      ),
            #  )

        cli.library("lib").entity("axi_bit_interleaver_tb").add_config(
            name=f"data_width={data_width},all_parameters",
            generics=dict(
                DATA_WIDTH=data_width,
                test_cfg="|".join(all_configs),
                NUMBER_OF_TEST_FRAMES=2,
            ),
        )

    addAxiStreamDelayTests(cli.library("lib").entity("axi_stream_delay_tb"))
    addAxiFileReaderTests(cli.library("lib").entity("axi_file_reader_tb"))
    addAxiFileCompareTests(cli.library("lib").entity("axi_file_compare_tb"))

    cli.set_compile_option("modelsim.vcom_flags", ["-explicit"])

    # Not all options are supported by all GHDL backends
    #  cli.set_compile_option("ghdl.flags", ["-frelaxed-rules"])
    #  cli.set_compile_option("ghdl.flags", ["-frelaxed-rules", "-O0", "-g"])
    cli.set_compile_option("ghdl.flags", ["-frelaxed-rules", "-O2", "-g"])

    # Make components not bound (error 3473) an error
    cli.set_sim_option("modelsim.vsim_flags", ["-error", "3473", '-voptargs="+acc=n"'])

    cli.set_sim_option("disable_ieee_warnings", True)
    cli.set_sim_option("modelsim.init_file.gui", p.join(ROOT, "wave.do"))
    cli.main()
Ejemplo n.º 30
0
from pathlib import Path
from vunit import VUnit

root = Path(__file__).parent
project = VUnit.from_argv()

project.add_library("Zx7E4").add_source_files(
    [root / "pkgs" / "*.vhd", root / "src" / "*.vhd", root / "test" / "*.vhd"])

project.main()
Ejemplo n.º 31
0
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this file,
# You can obtain one at http://mozilla.org/MPL/2.0/.
#
# Copyright (c) 2015, Lars Asplund [email protected]

"""
Example of how you can extract compilation order using VUnit
Note that you cannot run VUnit normally via this script
"""

from os.path import join
from vunit import VUnit
from project import create_project, ROOT

ui = VUnit.from_argv(argv=[])
create_project(ui)
source_files = ui.get_project_compile_order(target=join(ROOT, "compile_order_top.vhd"))

for source_file in source_files:
    print(source_file.library.name + ", " + source_file.name)
Ejemplo n.º 32
0
from vunit import VUnit, VUnitCLI

root = dirname(__file__)

# These lines add the option to specify the UVVM Utility Library root directory
# from the command line (python run.py -b <path to my UVVM root>). They
# can be replaced by a single line, ui = VUnit.from_argv(), if you assign the root
# directory to the uvvm_root variable directly
cli = VUnitCLI()
cli.parser.add_argument('-u',
                        '--uvvm-root',
                        required=True,
                        help='UVVM Utility Library root directory')
args = cli.parse_args()
ui = VUnit.from_args(args)
# ------

# Create VHDL libraries and add the related UVVM files to these
uvvm_root = args.uvvm_root

uvvm_lib = ui.add_library('uvvm_util')
uvvm_lib.add_source_files(join(uvvm_root, 'uvvm_util', 'src', '*.vhd'))

bitvis_vip_spi_lib = ui.add_library('bitvis_vip_sbi')
bitvis_vip_spi_lib.add_source_files(
    join(uvvm_root, 'bitvis_vip_sbi', 'src', '*.vhd'))

# Add all testbenches to lib
lib = ui.add_library('lib')
lib.add_source_files(join(root, 'test', 'tb_uvvm_integration.vhd'))
Ejemplo n.º 33
0
 def create(self) -> VUnit:
     """
     Override this function to specify custom instantiation of VUnit.
     """
     return VUnit.from_argv()
Ejemplo n.º 34
0
 def main(self, vu: VUnit):
     """
     Override this for final parametrization of the :class:`~vunit.ui.VUnit` instance, or for custom invocation of VUnit.
     """
     vu.main()
Ejemplo n.º 35
0
def main():
    "Main entry point for DVB FPGA test runner"

    _generateGnuRadioData()
    _createLdpcTables()

    cli = VUnitCLI()
    cli.parser.add_argument(
        "--individual-config-runs",
        "-i",
        action="store_true",
        help="Create individual test runs for each configuration. By default, "
        "all combinations of frame lengths, code rates and modulations are "
        "tested in the same simulation",
    )
    args = cli.parse_args()

    vunit = VUnit.from_args(args=args)
    vunit.add_osvvm()
    vunit.add_com()
    vunit.enable_location_preprocessing()
    if vunit.get_simulator_name() == "ghdl":
        vunit.add_preprocessor(GhdlPragmaHandler())

    library = vunit.add_library("lib")
    library.add_source_files(p.join(ROOT, "rtl", "*.vhd"))
    library.add_source_files(p.join(ROOT, "rtl", "ldpc", "*.vhd"))
    library.add_source_files(p.join(ROOT, "rtl", "bch_generated", "*.vhd"))
    library.add_source_files(p.join(ROOT, "testbench", "*.vhd"))

    vunit.add_library("str_format").add_source_files(
        p.join(ROOT, "third_party", "hdl_string_format", "src", "*.vhd"))

    vunit.add_library("fpga_cores").add_source_files(
        p.join(ROOT, "third_party", "fpga_cores", "src", "*.vhd"))
    vunit.add_library("fpga_cores_sim").add_source_files(
        p.join(ROOT, "third_party", "fpga_cores", "sim", "*.vhd"))

    if args.individual_config_runs:
        # BCH encoding doesn't depend on the constellation type, choose any
        for config in _getConfigs(
                constellations=(ConstellationType.MOD_8PSK, )):
            vunit.library("lib").entity("axi_bch_encoder_tb").add_config(
                name=config.name,
                generics=dict(
                    test_cfg=config.getTestConfigString(),
                    NUMBER_OF_TEST_FRAMES=8,
                ),
            )

            vunit.library("lib").entity("dvbs2_tx_tb").add_config(
                name=config.name,
                generics=dict(
                    test_cfg=config.getTestConfigString(),
                    NUMBER_OF_TEST_FRAMES=2,
                ),
            )

        # Only generate configs for 8 PSK since LDPC does not depend on this
        # parameter
        for config in _getConfigs(
                constellations=(ConstellationType.MOD_8PSK, ), ):
            vunit.library("lib").entity("axi_ldpc_encoder_tb").add_config(
                name=config.name,
                generics=dict(
                    test_cfg=config.getTestConfigString(),
                    NUMBER_OF_TEST_FRAMES=3,
                ),
            )

    else:
        addAllConfigsTest(
            entity=vunit.library("lib").entity("axi_bch_encoder_tb"),
            configs=TEST_CONFIGS,
        )

        addAllConfigsTest(
            entity=vunit.library("lib").entity("axi_ldpc_encoder_tb"),
            configs=_getConfigs(
                constellations=(ConstellationType.MOD_8PSK, ), ),
        )

        addAllConfigsTest(
            entity=vunit.library("lib").entity("dvbs2_tx_tb"),
            configs=tuple(TEST_CONFIGS),
        )

    addAllConfigsTest(
        entity=vunit.library("lib").entity("axi_baseband_scrambler_tb"),
        configs=TEST_CONFIGS,
    )

    # Generate bit interleaver tests
    for data_width in (1, 8):
        all_configs = []
        for config in _getConfigs():
            all_configs += [config.getTestConfigString()]

            if args.individual_config_runs:
                vunit.library("lib").entity(
                    "axi_bit_interleaver_tb").add_config(
                        name=f"data_width={data_width},{config.name}",
                        generics=dict(
                            DATA_WIDTH=data_width,
                            test_cfg=config.getTestConfigString(),
                            NUMBER_OF_TEST_FRAMES=8,
                        ),
                    )

        if not args.individual_config_runs:
            vunit.library("lib").entity("axi_bit_interleaver_tb").add_config(
                name=f"data_width={data_width},all_parameters",
                generics=dict(
                    DATA_WIDTH=data_width,
                    test_cfg="|".join(all_configs),
                    NUMBER_OF_TEST_FRAMES=2,
                ),
            )

    vunit.set_compile_option("modelsim.vcom_flags", ["-explicit"])

    # Not all options are supported by all GHDL backends
    vunit.set_sim_option("ghdl.elab_flags", ["-frelaxed-rules"])
    vunit.set_compile_option("ghdl.a_flags", ["-frelaxed-rules", "-O2", "-g"])

    # Make components not bound (error 3473) an error
    vsim_flags = ["-error", "3473"]
    if args.gui:
        vsim_flags += ['-voptargs="+acc=n"']

    vunit.set_sim_option("modelsim.vsim_flags", vsim_flags)

    vunit.set_sim_option("disable_ieee_warnings", True)
    vunit.set_sim_option("modelsim.init_file.gui", p.join(ROOT, "wave.do"))
    vunit.main()
Ejemplo n.º 36
0
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.

from collections import OrderedDict
import os.path
from fusesoc.config import Config
from fusesoc.coremanager import CoreManager, DependencyError
from vunit import VUnitCLI, VUnit

cli = VUnitCLI()
cli.parser.add_argument('--core', nargs=1, required=True, help='Top-level FuseSoC core')
args = cli.parse_args()

# Create VUnit instance by parsing command line arguments
vu = VUnit.from_args(args=args)

top_core = args.core[0]

#Create singleton instances for core manager and configuration handler
#Configuration manager is not needed in this example
cm = CoreManager()
#config = Config()

#Add core libraries that were picked up from fusesoc.conf by the config handler
#Not really necessary for this example as we can just add 'corelib' manually
try:
    #cm.add_cores_root(config.cores_root)
    cm.add_cores_root('corelib')
except (RuntimeError, IOError) as e:
    pr_warn("Failed to register cores root '{}'".format(str(e)))
Ejemplo n.º 37
0
        spec.loader.exec_module(mod)
        mod.create_test_suite(sim_lib)

    # avoid error "type of a shared variable must be a protected type"
    prj.set_compile_option("ghdl.a_flags", ["-frelaxed"])
    prj.set_sim_option("ghdl.elab_flags", ["-frelaxed"])

    # add code coverage if supported
    if prj.simulator_supports_coverage():
        prj.set_sim_option("enable_coverage", True)
        prj.set_compile_option("enable_coverage", True)


def post_run(results):
    """Collect the coverage results and create a report."""
    if PRJ.simulator_supports_coverage():
        results.merge_coverage(file_name="coverage_data")
        subprocess.call([
            "lcov", "--capture", "--directory", "coverage_data",
            "--output-file", "coverage.info"
        ])


if __name__ == "__main__":
    random.seed(42)
    np.random.seed(42)
    os.environ["VUNIT_SIMULATOR"] = "ghdl"
    PRJ = VUnit.from_argv()
    create_test_suites(PRJ)
    PRJ.main(post_run=post_run)
Ejemplo n.º 38
0
Archivo: run.py Proyecto: tivaliy/vunit
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this file,
# You can obtain one at http://mozilla.org/MPL/2.0/.
#
# Copyright (c) 2015-2017, Lars Asplund [email protected]

from os.path import join, dirname, basename
from vunit import VUnit
from vunit.check_preprocessor import CheckPreprocessor
from glob import glob

vhdl_path = join(dirname(__file__), "test")
ui = VUnit.from_argv(compile_builtins=False)
ui.add_builtins('vunit_lib', mock_log=True)
lib = ui.add_library('lib')
lib.add_source_files(join(vhdl_path, "test_support.vhd"))

if ui.vhdl_standard in ('2002', '2008'):
    lib.add_source_files(join(vhdl_path, "test_count.vhd"))
    lib.add_source_files(join(vhdl_path, "test_types.vhd"))
elif ui.vhdl_standard == '93':
    lib.add_source_files(join(vhdl_path, "test_count93.vhd"))

if ui.vhdl_standard == '2008':
    lib.add_source_files(join(vhdl_path, "tb_check_relation.vhd"),
                         [CheckPreprocessor()])
else:
    lib.add_source_files(join(vhdl_path, "tb_check_relation93_2002.vhd"),
                         [CheckPreprocessor()])

for file_name in glob(join(vhdl_path, "tb_*.vhd")):
Ejemplo n.º 39
0
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this file,
# You can obtain one at http://mozilla.org/MPL/2.0/.
#
# Copyright (c) 2014-2019, Lars Asplund [email protected]

from os.path import join, dirname, basename
from vunit import VUnit
from glob import glob

root = dirname(__file__)

ui = VUnit.from_argv()
lib = ui.library("vunit_lib")
for file_name in glob(join(root, "test", "*.vhd")):
    if basename(file_name).endswith("2008p.vhd") and ui.vhdl_standard not in [
            "2008",
            "2019",
    ]:
        continue
    lib.add_source_file(file_name)

ui.main()
Ejemplo n.º 40
0
# This Source Code Form is subject to the terms of the Mozilla Public
# License, v. 2.0. If a copy of the MPL was not distributed with this file,
# You can obtain one at http://mozilla.org/MPL/2.0/.
#
# Copyright (c) 2014-2018, Lars Asplund [email protected]

from os.path import join, dirname
from vunit import VUnit

root = dirname(__file__)

prj = VUnit.from_argv()
prj.add_com()
tb_com_lib = prj.add_library("tb_com_lib")
tb_com_lib.add_source_files(join(root, 'test', '*.vhd'))
pkg = tb_com_lib.package('custom_types_pkg')
pkg.generate_codecs(codec_package_name='custom_codec_pkg',
                    used_packages=[
                        'ieee.std_logic_1164', 'constants_pkg',
                        'tb_com_lib.more_constants_pkg'
                    ])
prj.main()