TCE is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA).

The toolset provides a complete co-design flow from C programs down to synthesizable VHDL and parallel program binaries. Processor customization points include the register files, function units, supported operations, and the interconnection network.

TCE has been developed by several researchers (and research assistants) of Tampere University of Technology (Finland) and various other international contributors since the early 2003.