def __init__(self, pre_vertex, post_vertex, synapse_information, label=None): ApplicationEdge.__init__(self, pre_vertex, post_vertex, label=label) self._synapse_information = [synapse_information]
def __init__(self, pre_vertex, post_vertex, input_port, reception_parameters): ApplicationEdge.__init__(self, pre_vertex=pre_vertex, post_vertex=post_vertex) self._input_port = input_port self._reception_parameters = reception_parameters
def _process_app_graph_vertex(self, vertex, machine_graph, application_graph): """ Inserts edges as required for a given vertex :param ExtraMonitorSupportMachineVertex vertex: the extra monitor core :param ~.MachineGraph machine_graph: machine graph object :param ~.ApplicationGraph application_graph: app graph object; not None :rtype: None """ gatherer = self._get_gatherer_vertex(vertex) # locate if edge is already built; if not, build it and do mapping if not self.__has_edge_already(vertex, gatherer, machine_graph): # See if there's an application edge already app_edge = self.__get_app_edge(application_graph, vertex.app_vertex, gatherer.app_vertex) if app_edge is None: app_edge = ApplicationEdge( vertex.app_vertex, gatherer.app_vertex, traffic_type=DataSpeedUp.TRAFFIC_TYPE) application_graph.add_edge( app_edge, PARTITION_ID_FOR_MULTICAST_DATA_SPEED_UP) # Use the application edge to build the machine edge edge = app_edge.create_machine_edge( vertex, gatherer, self.EDGE_LABEL.format(vertex, gatherer)) machine_graph.add_edge(edge, PARTITION_ID_FOR_MULTICAST_DATA_SPEED_UP)
def test_create_new_graph(self): vert1 = SimpleTestVertex(10, "New AbstractConstrainedVertex 1", 256) vert2 = SimpleTestVertex(5, "New AbstractConstrainedVertex 2", 256) vert3 = SimpleTestVertex(3, "New AbstractConstrainedVertex 3", 256) edge1 = ApplicationEdge(vert1, vert2, label="First edge") edge2 = ApplicationEdge(vert2, vert1, label="First edge") edge3 = ApplicationEdge(vert1, vert3, label="First edge") verts = [vert1, vert2, vert3] edges = [edge1, edge2, edge3] graph = ApplicationGraph("Graph") graph.add_vertices(verts) graph.add_edges(edges, "foo") # Any old partition label assert frozenset(verts) == frozenset(graph.vertices) assert frozenset(edges) == frozenset(graph.edges) assert edge1 not in graph.get_edges_ending_at_vertex(vert1) assert edge2 not in graph.get_edges_starting_at_vertex(vert1) assert edge3 not in graph.get_edges_ending_at_vertex(vert1) second = graph.clone(False) assert frozenset(verts) == frozenset(second.vertices) assert frozenset(edges) == frozenset(second.edges) third = graph.clone(True) assert frozenset(verts) == frozenset(third.vertices) assert frozenset(edges) == frozenset(third.edges) with self.assertRaises(PacmanConfigurationException): third.add_edge("mock", "mock") with self.assertRaises(PacmanConfigurationException): third.add_vertex("mock") with self.assertRaises(PacmanConfigurationException): third.add_outgoing_edge_partition("mock")
def setUp(self): """ setup for all basic partitioner tests """ unittest_setup() self.vert1 = SimpleTestVertex(10, "New AbstractConstrainedVertex 1") self.vert1.splitter = SplitterSliceLegacy() self.vert2 = SimpleTestVertex(5, "New AbstractConstrainedVertex 2") self.vert2.splitter = SplitterSliceLegacy() self.vert3 = SimpleTestVertex(3, "New AbstractConstrainedVertex 3") self.vert3.splitter = SplitterSliceLegacy() self.edge1 = ApplicationEdge(self.vert1, self.vert2, label="First edge") self.edge2 = ApplicationEdge(self.vert2, self.vert1, label="Second edge") self.edge3 = ApplicationEdge(self.vert1, self.vert3, label="Third edge") self.verts = [self.vert1, self.vert2, self.vert3] self.edges = [self.edge1, self.edge2, self.edge3] self.graph = ApplicationGraph("Graph") self.graph.add_vertices(self.verts) self.graph.add_edges(self.edges, "foo") n_processors = 18 (e, ne, n, w, _, _) = range(6) links = list() links.append(Link(0, 0, e, 0, 1)) _sdram = SDRAM(128 * (2**20)) links = list() links.append(Link(0, 0, e, 1, 1)) links.append(Link(0, 1, ne, 1, 0)) links.append(Link(1, 1, n, 0, 0)) links.append(Link(1, 0, w, 0, 1)) r = Router(links, False, 1024) ip = TestBasicPartitioner.TheTestAddress chips = list() for x in range(5): for y in range(5): if x == y == 0: chips.append(Chip(x, y, n_processors, r, _sdram, 0, 0, ip)) else: chips.append(Chip(x, y, n_processors, r, _sdram, 0, 0)) self.machine = machine_from_chips(chips)
def _update_app_graph_and_mapper(application_graph, graph_mapper, machine_lpg, vertex, partition_id, machine_edge, app_graph_edge): """ Handles changes to the application graph and graph mapper. :param application_graph: the application graph :param graph_mapper: the graph mapper :param machine_lpg: the machine LPG :param vertex: the application vertex to link to :param partition_id: the partition ID to put the edge on :return the application edge for this vertex and LPG :rtype: ApplicationEdge """ # pylint: disable=too-many-arguments # locate app vertex for LPG lpg_app_vertex = graph_mapper.get_application_vertex(machine_lpg) # if not built the app edge, add the app edge now if app_graph_edge is None: app_graph_edge = ApplicationEdge(vertex, lpg_app_vertex) application_graph.add_edge(app_graph_edge, partition_id) # add mapping between the app edge and the machine edge graph_mapper.add_edge_mapping(machine_edge, app_graph_edge) # return the app edge for reuse as needed return app_graph_edge
def setup(self): """ setup for all basic partitioner tests """ self.vert1 = SimpleTestVertex(10, "New AbstractConstrainedVertex 1") self.vert2 = SimpleTestVertex(5, "New AbstractConstrainedVertex 2") self.vert3 = SimpleTestVertex(3, "New AbstractConstrainedVertex 3") self.edge1 = ApplicationEdge(self.vert1, self.vert2, None, "First edge") self.edge2 = ApplicationEdge(self.vert2, self.vert1, None, "Second edge") self.edge3 = ApplicationEdge(self.vert1, self.vert3, None, "Third edge") self.verts = [self.vert1, self.vert2, self.vert3] self.edges = [self.edge1, self.edge2, self.edge3] self.graph = ApplicationGraph("Graph") self.graph.add_vertices(self.verts) self.graph.add_edges(self.edges, "foo") flops = 200000000 (e, _, n, w, _, s) = range(6) processors = list() for i in range(18): processors.append(Processor(i, flops)) links = list() links.append(Link(0, 0, 0, 0, 1, s, s)) _sdram = SDRAM(128 * (2**20)) links = list() links.append(Link(0, 0, 0, 1, 1, n, n)) links.append(Link(0, 1, 1, 1, 0, s, s)) links.append(Link(1, 1, 2, 0, 0, e, e)) links.append(Link(1, 0, 3, 0, 1, w, w)) r = Router(links, False, 100, 1024) ip = TestBasicPartitioner.TheTestAddress chips = list() for x in range(5): for y in range(5): chips.append(Chip(x, y, processors, r, _sdram, 0, 0, ip)) self.machine = Machine(chips, 0, 0) self.bp = BasicPartitioner()
def create_machine_vertices( self, resource_tracker, machine_graph, app_graph): # slices self._post_slice = Slice( 0, int(self._governed_app_vertex.n_atoms / self.N_VERTS)) for count in range(1, self.N_VERTS): self._pre_slices.append(Slice( self._post_slice.n_atoms * count, self._post_slice.n_atoms * count + self._post_slice.n_atoms)) # mac verts self._post_vertex = ( SDRAMMachineVertex( vertex_slice=self._post_slice, label=None, constraints=None, app_vertex=self._governed_app_vertex, sdram_cost=self._governed_app_vertex.fixed_sdram_value)) resource_tracker.allocate_constrained_resources( self._post_vertex.resources_required, self._governed_app_vertex.constraints, vertices=[self._post_vertex]) machine_graph.add_vertex(self._post_vertex) for vertex_slice in self._pre_slices: pre_vertex = ( SDRAMMachineVertex( vertex_slice=vertex_slice, label=None, constraints=None, app_vertex=self._governed_app_vertex, sdram_cost=self._governed_app_vertex.fixed_sdram_value)) self._pre_vertices.append(pre_vertex) # allocate res resource_tracker.allocate_constrained_resources( pre_vertex.resources_required, self._governed_app_vertex.constraints, vertices=[pre_vertex]) # add to mac graph machine_graph.add_vertex(pre_vertex) # add outgoing edge partition to mac graph machine_graph.add_outgoing_edge_partition(self._partition_type( identifier="sdram", pre_vertices=self._pre_vertices, label="sdram")) # add edge between the two verts app and mac self._app_edge = ApplicationEdge( self._governed_app_vertex, self._governed_app_vertex) app_graph.add_edge(self._app_edge, "sdram_app") # mac add for pre_vertex in self._pre_vertices: edge = SDRAMMachineEdge( pre_vertex, self._post_vertex, label="sdram", app_edge=self._app_edge) machine_graph.add_edge(edge, "sdram") return [self._post_vertex].extend(self._pre_vertices)
def test_partition_with_no_additional_constraints_extra_edge(self): """ test that the basic form with an extra edge works """ self.graph.add_edge( ApplicationEdge(self.vert3, self.vert1, label="extra"), "TEST") graph, _ = splitter_partitioner(self.graph, self.machine, 3000) self.assertEqual(len(list(graph.vertices)), 3) self.assertEqual(len(list(graph.edges)), 4)
def test_create_new_graph(self): vert1 = SimpleTestVertex(10, "New AbstractConstrainedVertex 1", 256) vert2 = SimpleTestVertex(5, "New AbstractConstrainedVertex 2", 256) vert3 = SimpleTestVertex(3, "New AbstractConstrainedVertex 3", 256) edge1 = ApplicationEdge(vert1, vert2, None, "First edge") edge2 = ApplicationEdge(vert2, vert1, None, "First edge") edge3 = ApplicationEdge(vert1, vert3, None, "First edge") verts = [vert1, vert2, vert3] edges = [edge1, edge2, edge3] graph = ApplicationGraph("Graph") graph.add_vertices(verts) graph.add_edges(edges, "foo") # Any old partition label assert frozenset(verts) == frozenset(graph.vertices) assert frozenset(edges) == frozenset(graph.edges) assert edge1 not in graph.get_edges_ending_at_vertex(vert1) assert edge2 not in graph.get_edges_starting_at_vertex(vert1) assert edge3 not in graph.get_edges_ending_at_vertex(vert1)
def create_machine_vertices(self, resource_tracker, machine_graph, app_graph): # slices self._pre_slice = Slice(0, int(self._governed_app_vertex.n_atoms / 2)) self._post_slice = Slice( int(self._governed_app_vertex.n_atoms / 2) + 1, int(self._governed_app_vertex.n_atoms - 1)) # mac verts self._pre_vertex = (SDRAMMachineVertex( vertex_slice=self._pre_slice, label=None, constraints=None, app_vertex=self._governed_app_vertex, sdram_cost=self._governed_app_vertex.fixed_sdram_value)) self._post_vertex = (SDRAMMachineVertex( vertex_slice=self._post_slice, label=None, constraints=None, app_vertex=self._governed_app_vertex, sdram_cost=self._governed_app_vertex.fixed_sdram_value)) # allocate res resource_tracker.allocate_constrained_resources( self._pre_vertex.resources_required, self._governed_app_vertex.constraints, vertices=[self._pre_vertex]) resource_tracker.allocate_constrained_resources( self._post_vertex.resources_required, self._governed_app_vertex.constraints, vertices=[self._post_vertex]) # add to mac graph machine_graph.add_vertex(self._pre_vertex) machine_graph.add_vertex(self._post_vertex) # add outgoing edge partition to mac graph machine_graph.add_outgoing_edge_partition( self._partition_type(identifier="sdram", pre_vertex=self._pre_vertex, label="sdram")) # add edge between the two verts app and mac self._app_edge = ApplicationEdge(self._governed_app_vertex, self._governed_app_vertex) app_graph.add_edge(self._app_edge, "sdram_app") # mac add edge = SDRAMMachineEdge(self._pre_vertex, self._post_vertex, label="sdram", app_edge=self._app_edge) machine_graph.add_edge(edge, "sdram") return [self._pre_vertex, self._post_vertex]
def create_and_add_to_graphs_and_resources(self, resource_tracker, machine_graph, graph_mapper, application_graph): mc_app_edge = ApplicationEdge(self, self) sdram_app_edge = ApplicationEdge(self, self, EdgeTrafficType.SDRAM) application_graph.add_edge(mc_app_edge, self.MC_APP_EDGE_PARTITION_ID) application_graph.add_edge(sdram_app_edge, self.SDRAM_APP_EDGE_PARTITION_ID) # atom tracker current_atom_count = 0 timer_period = (MICRO_TO_SECOND_CONVERSION * self._model.seq_size / self._model.fs) # ome vertex ome_vertex, current_atom_count = self._build_ome_vertex( machine_graph, graph_mapper, current_atom_count, resource_tracker, timer_period) # handle the drnl verts current_atom_count = self._build_drnl_verts(machine_graph, graph_mapper, current_atom_count, resource_tracker, ome_vertex, timer_period) # handle edges between ome and drnls self._build_edges_between_ome_drnls(ome_vertex, machine_graph, mc_app_edge, graph_mapper) # build the ihcan verts. self._ihcan_vertices, current_atom_count = ( self._build_ihcan_vertices_and_sdram_edges( machine_graph, graph_mapper, current_atom_count, resource_tracker, mc_app_edge, sdram_app_edge, timer_period)) # build aggregation group verts and edges self._build_aggregation_group_vertices_and_edges( machine_graph, graph_mapper, current_atom_count, resource_tracker, mc_app_edge)
def test_partition_with_no_additional_constraints_extra_edge(self): """test that the basic form with an extra edge works """ self.graph.add_edge(ApplicationEdge(self.vert3, self.vert1), "TEST") graph, _ = splitter_partitioner( self.graph, self.machine, plan_n_time_steps=100, pre_allocated_resources=PreAllocatedResourceContainer()) self.assertEqual(len(list(graph.vertices)), 3) self.assertEqual(len(list(graph.edges)), 4)
def setup(self): sim.setup(model_binary_module=common) vertex_1 = SdramTestVertex(2, fixed_sdram_value=20) vertex_1.splitter = SDRAMSplitterExternal( DestinationSegmentedSDRAMMachinePartition) vertex_2 = SdramTestVertex(2, fixed_sdram_value=20) vertex_2.splitter = SDRAMSplitterExternal( DestinationSegmentedSDRAMMachinePartition) vertex_3 = SdramTestVertex(2, fixed_sdram_value=20) vertex_3.splitter = SDRAMSplitterExternal( DestinationSegmentedSDRAMMachinePartition) sim.add_vertex_instance(vertex_1) sim.add_vertex_instance(vertex_2) sim.add_vertex_instance(vertex_3) sim.add_application_edge_instance(ApplicationEdge(vertex_1, vertex_2), "sdram") sim.add_application_edge_instance(ApplicationEdge(vertex_1, vertex_3), "sdram") sim.run(100) sim.stop()
def add_edge(vertex, device_vertex, partition_id): """ Add an edge between two vertices (often a vertex and a external\ device) on a given partition. :param vertex: the pre vertex to connect the edge from :param device_vertex: the post vertex to connect the edge to :param partition_id: the partition identifier for making nets :rtype: None """ _spinnaker = get_simulator() edge = ApplicationEdge(vertex, device_vertex) _spinnaker.add_application_edge(edge, partition_id)
def edges_and_partitions(self): edges = list() partition_ids = list() keys_added = set() for vertex in self._vertex_to_key_map: for key in self._vertex_to_key_map[vertex]: if key not in keys_added: keys_added.add(key) app_edge = ApplicationEdge(self, vertex) edges.append(app_edge) partition_ids.append(self._keys_to_partition_id[key]) return edges, partition_ids
def setup(self): sim.setup(model_binary_module=common) vertex_1 = SdramTestVertex(12, fixed_sdram_value=20) vertex_1.splitter = BasicSDRAMSplitter() vertex_2 = SdramTestVertex(12, fixed_sdram_value=20) vertex_2.splitter = SDRAMSplitter( SourceSegmentedSDRAMMachinePartition, vertex_1.splitter) sim.add_vertex_instance(vertex_1) sim.add_vertex_instance(vertex_2) sim.add_application_edge_instance( ApplicationEdge(vertex_1, vertex_2), "sdram") sim.run(100) sim.stop()
def add_edge(vertex, device_vertex, partition_id): """ Add an edge between two vertices (often a vertex and a external\ device) on a given partition. :param ~pacman.model.graphs.application.ApplicationVertex vertex: the pre-vertex to connect the edge from :param device_vertex: the post vertex to connect the edge to :type device_vertex: ~pacman.model.graphs.application.ApplicationVertex :param str partition_id: the partition identifier for making nets """ _spinnaker = get_simulator() edge = ApplicationEdge(vertex, device_vertex) _spinnaker.add_application_edge(edge, partition_id)
def setup(self): sim.setup(model_binary_module=test_c_sdram_with_recording) vertex_1 = SimpleTestVertex(2, fixed_sdram_value=20) vertex_1.splitter = SDRAMSplitterExternal( ConstantSDRAMMachinePartition) vertex_2 = SimpleTestVertex(2, fixed_sdram_value=20) vertex_2.splitter = SDRAMSplitterExternal( ConstantSDRAMMachinePartition) sim.add_vertex_instance(vertex_1) sim.add_vertex_instance(vertex_2) sim.add_application_edge_instance( ApplicationEdge(vertex_1, vertex_2), "sdram") sim.run(100) sim.stop()
def setup(self): sim.setup(model_binary_module=common) vertex_1 = SdramTestVertex(2, fixed_sdram_value=200 * 1024 * 1024) vertex_1.splitter = SDRAMSplitterExternal( ConstantSDRAMMachinePartition) vertex_2 = SdramTestVertex(2, fixed_sdram_value=200 * 1024 * 1024) vertex_2.splitter = SDRAMSplitterExternal( ConstantSDRAMMachinePartition) sim.add_vertex_instance(vertex_1) sim.add_vertex_instance(vertex_2) sim.add_application_edge_instance(ApplicationEdge(vertex_1, vertex_2), "sdram") with self.assertRaises(PacmanValueError): sim.run(100)
def setUp(self): # sort out graph self.vert1 = Vertex(10, "New AbstractConstrainedVertex 1") self.vert2 = Vertex(5, "New AbstractConstrainedVertex 2") self.edge1 = ApplicationEdge(self.vert1, self.vert2, "First edge") self.verts = [self.vert1, self.vert2] self.edges = [self.edge1] self.graph = ApplicationGraph("Graph", self.verts, self.edges) # sort out graph self.graph = MachineGraph() self.vertex1 = SimpleMachineVertex( 0, 10, self.vert1.get_resources_used_by_atoms(0, 10, [])) self.vertex2 = SimpleMachineVertex( 0, 5, self.vert2.get_resources_used_by_atoms(0, 10, [])) self.edge = MachineEdge(self.vertex1, self.vertex2) self.graph.add_vertex(self.vertex1) self.graph.add_vertex(self.vertex2) self.graph.add_edge(self.edge, "TEST")
def _process_vertex(self, vertex, machine, placements, machine_graph, vertex_to_ethernet_connected_chip_mapping, application_graph, graph_mapper): """ Inserts edges as required for a given vertex :param vertex: the extra monitor core :param machine: the spinnMachine instance :param placements: the placements object :param machine_graph: machine graph object :param vertex_to_ethernet_connected_chip_mapping: \ the ethernet to multicast gatherer map :param application_graph: app graph object :param graph_mapper: the mapping between app and machine graph :rtype: None """ # pylint: disable=too-many-arguments data_gatherer_vertex = self._get_gatherer_vertex( machine, vertex_to_ethernet_connected_chip_mapping, placements, vertex) # locate if edge is already built; if not, build it and do mapping if not self._has_edge_already(vertex, data_gatherer_vertex, machine_graph): machine_edge = MachineEdge(vertex, data_gatherer_vertex, traffic_type=DataSpeedUp.TRAFFIC_TYPE) machine_graph.add_edge(machine_edge, PARTITION_ID_FOR_MULTICAST_DATA_SPEED_UP) if application_graph is not None: app_source = graph_mapper.get_application_vertex(vertex) app_dest = graph_mapper.get_application_vertex( data_gatherer_vertex) # locate if edge is already built; if not, build it and map it if not self._has_edge_already(app_source, app_dest, application_graph): app_edge = ApplicationEdge( app_source, app_dest, traffic_type=DataSpeedUp.TRAFFIC_TYPE) application_graph.add_edge( app_edge, PARTITION_ID_FOR_MULTICAST_DATA_SPEED_UP) graph_mapper.add_edge_mapping(machine_edge, app_edge)
def _connect_lpg_vertex_in_application_graph(self, app_graph, m_graph, app_vertex, lpg_params, p_ids, n_keys_map): """ :param ~.ApplicationGraph app_graph: :param ~.MachineGraph m_graph: :param ~.ApplicationVertex app_vertex: :param LivePacketGatherParameters lpg_params: :param list(str) p_ids: :param ~.DictBasedMachinePartitionNKeysMap n_keys_map: """ if not app_vertex.machine_vertices or not p_ids: return # flag for ensuring we don't add the edge to the app graph many times app_edges = dict() m_partitions = set() # iterate through the associated machine vertices for vertex in app_vertex.machine_vertices: lpg = self._find_closest_live_packet_gatherer(vertex, lpg_params) # if not yet built the app edges, add them now # has to be postponed until we know the LPG if not app_edges: for partition_id in p_ids: app_edge = ApplicationEdge(app_vertex, lpg.app_vertex) app_graph.add_edge(app_edge, partition_id) app_edges[partition_id] = app_edge # add a edge between the closest LPG and the app_vertex for partition_id in p_ids: machine_edge = app_edges[partition_id].create_machine_edge( vertex, lpg, None) m_graph.add_edge(machine_edge, partition_id) # add to n_keys_map if needed if n_keys_map: m_partitions.add( m_graph.get_outgoing_partition_for_edge(machine_edge)) self._process_partitions(m_partitions, n_keys_map)
def setUp(self): ####################################################################### # Setting up vertices, edges and graph # ####################################################################### self.vert1 = T_AppVertex(100, "New AbstractConstrainedVertex 1") self.vert2 = T_AppVertex(5, "New AbstractConstrainedVertex 2") self.vert3 = T_AppVertex(3, "New AbstractConstrainedVertex 3") self.edge1 = ApplicationEdge(self.vert1, self.vert2, "First edge") self.edge2 = ApplicationEdge(self.vert2, self.vert1, "Second edge") self.edge3 = ApplicationEdge(self.vert1, self.vert3, "Third edge") self.verts = [self.vert1, self.vert2, self.vert3] self.edges = [self.edge1, self.edge2, self.edge3] self.graph = ApplicationGraph("Graph", self.verts, self.edges) ####################################################################### # Setting up machine # ####################################################################### flops = 1000 (_, _, n, _, _, s) = range(6) processors = list() for i in range(18): processors.append(Processor(i, flops)) _sdram = SDRAM(128 * (2**20)) ip = "192.168.240.253" chips = list() for x in range(10): for y in range(10): links = list() links.append(Link(x, y, 0, (x + 1) % 10, y, n, n)) links.append(Link(x, y, 1, (x + 1) % 10, (y + 1) % 10, s, s)) links.append(Link(x, y, 2, x, (y + 1) % 10, n, n)) links.append(Link(x, y, 3, (x - 1) % 10, y, s, s)) links.append(Link(x, y, 4, (x - 1) % 10, (y - 1) % 10, n, n)) links.append(Link(x, y, 5, x, (y - 1) % 10, s, s)) r = Router(links, False, 100, 1024) chips.append(Chip(x, y, processors, r, _sdram, ip)) self.machine = Machine(chips) ####################################################################### # Setting up graph and graph_mapper # ####################################################################### self.vertices = list() self.vertex1 = T_MachineVertex(0, 1, get_resources_used_by_atoms(0, 1, []), "First vertex") self.vertex2 = T_MachineVertex(1, 5, get_resources_used_by_atoms(1, 5, []), "Second vertex") self.vertex3 = T_MachineVertex(5, 10, get_resources_used_by_atoms(5, 10, []), "Third vertex") self.vertex4 = T_MachineVertex( 10, 100, get_resources_used_by_atoms(10, 100, []), "Fourth vertex") self.vertices.append(self.vertex1) self.vertices.append(self.vertex2) self.vertices.append(self.vertex3) self.vertices.append(self.vertex4) self.edges = list() self.graph = MachineGraph(self.vertices, self.edges) self.graph_mapper = GraphMapper() self.graph_mapper.add_vertices(self.vertices)
def __init__(self, prevertex, delayvertex, label=None): ApplicationEdge.__init__(self, prevertex, delayvertex, label=label)
def create_machine_vertices( self, resource_tracker, machine_graph, app_graph): # slices self._post_slice = Slice( 0, int(self._governed_app_vertex.n_atoms / self.N_VERTS)) for count in range(1, self.N_VERTS): self._pre_slices.add(Slice( self._post_slice.n_atoms * count, self._post_slice.n_atoms * count + self._post_slice.n_atoms)) # mac verts self._post_vertex = ( SDRAMMachineVertex( vertex_slice=self._post_slice, label=None, constraints=None, app_vertex=self._governed_app_vertex, sdram_cost=self._governed_app_vertex.fixed_sdram_value)) resource_tracker.allocate_constrained_resources( self._post_vertex.resources_required, self._governed_app_vertex.constraints) machine_graph.add_vertex(self._post_vertex) for vertex_slice in self._pre_slices: pre_vertex = ( SDRAMMachineVertex( vertex_slice=vertex_slice, label=None, constraints=None, app_vertex=self._governed_app_vertex, sdram_cost=self._governed_app_vertex.fixed_sdram_value)) self._pre_vertices.add(pre_vertex) # allocate res resource_tracker.allocate_constrained_resources( pre_vertex.resources_required, self._governed_app_vertex.constraints) # add to mac graph machine_graph.add_vertex(pre_vertex) # add outgoing edge partition to mac graph if self._other_splitter is not None: total_pre_verts = list() total_pre_verts.extend(self._pre_vertices) for incoming_edge in app_graph.get_edges_ending_at_vertex( self._governed_app_vertex): if (incoming_edge.pre_vertex.splitter == self._other_splitter): outgoing_edge_partition = ( app_graph.get_outgoing_partition_for_edge( incoming_edge)) total_pre_verts.extend( self._other_splitter.get_out_going_vertices( incoming_edge, outgoing_edge_partition)) machine_graph.add_outgoing_edge_partition(self._partition_type( identifier="sdram", pre_vertices=total_pre_verts, label="sdram")) # add edge between the two verts app and mac self._app_edge = ApplicationEdge( self._governed_app_vertex, self._governed_app_vertex) app_graph.add_edge(self._app_edge, "sdram_app") # mac add for pre_vertex in self._pre_vertices: edge = SDRAMMachineEdge( pre_vertex, self._post_vertex, label="sdram", app_edge=self._app_edge) machine_graph.add_edge(edge, "sdram") return [self._post_vertex].extend(self._pre_vertices)
def _stack_interposers( self, interposer_application_graph, interposers, random_number_generator, seed): """Return a new list of interposers and a new communication map resulting from combining compatible interposers. Returns ------- ([Interposer, ...], ConnectionMap) A collection of new interposer operators and a new connection map with compatible interposers stacked. """ # Determine which interposers can be stacked and build a map of # {interposer: (StackedInterposer, offset)}. Using this information we # copy signals from the old connection map into the new connection map, # replacing connections to stacked interposers by modifying their # output slice and stacking the connections from interposers in a # similar manner. # Create a mapping {{(sig params, sink), ...}: [Interposer, ...], ...} # to determine which interposers can be stacked (as they have a common # output set). compatible_interposers = defaultdict(list) for interposer in interposers: # Build up a set of the outputs for each interposer. outgoing_partition = interposer_application_graph.\ get_outgoing_edge_partition_starting_at_vertex( interposer, constants.OUTPUT_PORT.STANDARD) compatible_interposers[outgoing_partition].append(interposer) # For each group of compatible interposers create a new, stacked, # interposer. stacked_interposers = dict() # {StackedInterposer: [Interposer,...]} stacking = dict() # {Interposers: (StackedInterposer, offset)} for interposer_group in itervalues(compatible_interposers): # Create the new interposer new_interposer = InterposerApplicationVertex( sum(i.size_in for i in interposer_group), label="stacked interposer for the interposer group{}".format( interposer_group), rng=random_number_generator, seed=seed) stacked_interposers[new_interposer] = interposer_group # Store a mapping from the original interposers to the new # interposer and their offset into its input space. offset = 0 for interposer in interposer_group: stacking[interposer] = (new_interposer, offset) offset += interposer.size_in # Increase the offset # Create a new app graph and copy connections into it. stacked_interposer_graph = Graph( allowed_vertex_types=AbstractNengoApplicationVertex, allowed_edge_types=ApplicationEdge, allowed_partition_types=AbstractOutgoingEdgePartition, label=constants.INTER_APP_GRAPH_NAME) # add none interposer vertices for vertex in interposer_application_graph.vertices: if isinstance(vertex, InterposerApplicationVertex): continue for outgoing_partition in interposer_application_graph.\ get_outgoing_edge_partitions_starting_at_vertex(vertex): # only process none interposers sources if vertex not in stacking: self._process_stackable_interposer( outgoing_partition, stacking, random_number_generator, stacked_interposer_graph, vertex, seed) # For each stacked interposer build up a mapping from sinks, reception # parameters and signal parameters to the transmission parameters that # target it for each unstacked interposer. Subsequently stack these # transmission parameters and add the resulting signal to the network. for new_interposer, interposer_group in iteritems(stacked_interposers): # Map from (sink, signal_parameters) to an ordered list of # transmission parameters. connections = defaultdict(list) for old_interposer in interposer_group: outgoing_partitions = interposer_application_graph.\ get_outgoing_edge_partitions_starting_at_vertex( old_interposer) for outgoing_partition in outgoing_partitions: out_going_partition_destinations = \ outgoing_partition.edge_destinations for destination_vertex in out_going_partition_destinations: connections[ (destination_vertex, outgoing_partition.latching_required, outgoing_partition.weight)].append( outgoing_partition.transmission_params) # For each unique pair of sink and signal parameters add a new # connection to the network which is the result of stacking # together the transmission parameters. for (destination_vertex, latching_required, weight), trans_pars in \ iteritems(connections): # Construct the combined signal parameters transmission_params = trans_pars[0].hstack(*trans_pars[1:]) # set up new outgoing partition with correct params stacked_outgoing_partition = \ ConnectionOutgoingPartition( identifier=outgoing_partition.identifer, rng=random_number_generator, pre_vertex=new_interposer, seed=seed) stacked_outgoing_partition.set_all_parameters( transmission_params=transmission_params, reception_params=outgoing_partition.reception_params, latching_required=latching_required, weight=weight, source_output_port=outgoing_partition.source_output_port, destination_input_port=( outgoing_partition.destination_input_port)) # add to the graph stacked_interposer_graph.add_outgoing_edge_partition( stacked_outgoing_partition) stacked_interposer_graph.add_edge( ApplicationEdge(new_interposer, destination_vertex), outgoing_partition.identifer) return stacked_interposer_graph