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I'm preparing a framework for initial configuration of AFCK with UrJTAG. It integrates in a single script the configuration of SCANSTA111 and configuration of I2C connected features (e.g. clocks) The interesting thing is an object layer which handles the whole I2C tree, so if one wants to talk to a particular chip, all muxes and switches are automatically configured in an appriate way. Unfortunately the design suffers from one serious problem. Configuration of the FPGA via UrJTAG with SVF file takes a loooong time: Initialization time:765.7399261 [s] That's definitely too long. I thought about calling Impact as an external process to do this faster, but it still takes 357 seconds! Even configuration with the standard .bit file generated by Vivado with impact takes 245 seconds! (in Vivado it takes less then 1 minute) So it is not the sole fault of urJTAG.... You should compile the I2C controller core with the script build_afck_clk_config in the "fpga" directory. Then you can copy the i2c_bscan_ctrl_top.bit to the "convert" directory and generate the AFCK_i2c_bscan_ctrl.svf file (which should be then moved to the python directory. You can start the whole thing with "python -i start.py" in the "python" directory, so at the end you'll have an interactive environment to play with settings. You can also add your configuration instructions at the end of the file (as it is done now), and run just "python start.py". Please note, that you'll need a patched version of urJTAG, which recognizes the Kintex 7 chip found in the AFCK: http://sourceforge.net/p/urjtag/mailman/message/34120063/ Don't interrupt the veeery long configuration of the FPGA, or you'll end with hung XPC programmer, which can be unlocked only via disconnection and reconnection of the USB cable (I've done it when working remotely. Even restart of the PC has not helped). In the interactive environment we can read the frequency meters: jb.jt_read(1) - clock on the otput 4 from the clock matrix jb.jt_read(2) - clock 0 from FM-S14 in FMC1 jb.jt_read(3) - clock 0 from FM-S14 in FMC2 You can control the clock matrix: ClkMtx_set_out(in,out) (in==-1 switches off the output out) You can set the frequency of the Si570: SiSetFrq(frq) You can set the frequency of clocks in the FM-S14 boards: FmcSetFrq(fmc,clk,freq)
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This repository contains tools for configuring the AFCK board with Python tools using UrJTAG library
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