def __init__(self, name, addr, width, access='rw', default=0, comment=""):
global _width
_Signal.__init__(self, intbv(default)[width:])
self._nmb = [None for _ in range(width)] # hold the named-bits
self.name = name # the name of the register
self.addr = addr # address of the register
self.width = width # width of the register
self.access = access # access type, 'rw' or 'ro'
self.default = default # default value for this register
self.comment = comment # a comment for this register
self.bits = {} # dict with namedbits Signals
self.rfidx = -1 # index in the regfile list
self.has_namedbits = False # this register has named bits
# @todo: are these used ?
# the register read and write strobes to the peripheral
self.wr = Signal(bool(0))
self.rd = Signal(bool(0))
if _width is None:
_width = width
else:
assert width == _width, "All registers must be the same width"
def __init__(self, name, addr, width, access='rw', default=0, comment=""):
global _width
_Signal.__init__(self, intbv(default)[width:])
self._nmb = [None for ii in range(width)] # hold the named-bits
self.name = name # the name of the register
self.addr = addr # address of the register
self.width = width # width of the register
self.access = access # access type, 'rw' or 'ro'
self.default = default # default value for this register
self.comment = comment # a comment for this register
self.bits = {} # dict with namedbits Signals
self.rfidx = -1 # index in the regfile list
self.has_namedbits = False # this register has named bits
# @todo: are these used ?
# the register read and write strobes to the peripheral
self.wr = Signal(bool(0))
self.rd = Signal(bool(0))
if _width is None:
_width = width
else:
assert width == _width, "All registers must be the same width"
def __init__(self, val, active, async):
""" Construct a ResetSignal.
This is to be used in conjunction with the always_seq decorator,
as the reset argument.
"""
_Signal.__init__(self, bool(val))
self.active = bool(active)
self.async = async
def __init__(self, val, active, async):
""" Construct a ResetSignal.
This is to be used in conjunction with the always_seq decorator,
as the reset argument.
"""
_Signal.__init__(self, bool(val))
self.active = bool(active)
self. async = async
def __init__(self,name,addr,width,access='rw',default=0,comment=""):
global _width
# the register read and write strobes to the
# peripheral
_Signal.__init__(self,intbv(default)[width:])
self.wr = Signal(bool(0))
self.rd = Signal(bool(0))
self.name = name
self.addr = addr
self.width = width
self.access = access
self.default = default
self.comment = comment
self.bits = {}
if _width is None:
_width = width
else:
assert width == _width, "All registers must be the same width"
def __init__(self, name, addr, width, access='rw', default=0, comment=""):
global _width
_Signal.__init__(self,intbv(default)[width:])
self._nmb = [None for ii in range(width)] # hold the named-bits
self.name = name
self.addr = addr
self.width = width
self.access = access
self.default = default
self.comment = comment
self.bits = {}
# @todo: are these used
# the register read and write strobes to the peripheral
self.wr = Signal(bool(0))
self.rd = Signal(bool(0))
if _width is None:
_width = width
else:
assert width == _width, "All registers must be the same width"
def __init__(self, val):
_Signal.__init__(self, val)
def __init__(self, sig):
_Signal.__init__(self, sig._orival)
# reset signal values to None
self._next = self._val = self._init = None
self._sig = sig
def __init__(self, bus):
_Signal.__init__(self, bus._val)
self._val = None
self._bus = bus
def __init__(self, val):
_Signal.__init__(self, val)
def __init__(self, sig):
_Signal.__init__(self, sig._orival)
# reset signal values to None
self._next = self._val = self._init = None
self._sig = sig
def __init__(self, bus):
_Signal.__init__(self, bus._val)
self._val = None
self._bus = bus
