def getSwcSswitch(direction, track, grid_loc, net_name): VERBOSE = 1 if cap_nams[-1] != net_name: cap_nams.append(net_name) cap_vals.append(38e-15) else: cap_vals[-1] = cap_vals[-1]+38e-15 if cap_seq[-1] == 2: cap_vals[-1] = cap_vals[-1]+160e-15 cap_seq.append(2) tile_type = getTileType('SBLOCK', grid_loc) tile_loc = getTileLoc('SBLOCK', grid_loc) #get direction partial switch #sub_swc1 = array[tile_type]['SBLOCK'][direction] sub_swc1 = chipStats().get(tile_type).get('sblock')[direction] #get track partial switch track_name = 'T' + track #sub_swc2 = array[tile_type]['SBLOCK'][track_name] sub_swc2 = chipStats().get(tile_type).get('sblock')[track_name] #switch address based on direction then adding a track based offset swc = [sub_swc1[0] + sub_swc2[0], sub_swc1[1] + sub_swc2[1]] #add block offset swc = getTileOffset(swc, tile_loc) if VERBOSE==1 or VERBOSE>1: print '%s [%s,%s] SBLOCK %s (%s %s)' % (tile_type, str(tile_loc[0]).rjust(2), str(tile_loc[1]).rjust(2), direction, str(swc[0]), str(swc[1])), if VERBOSE>1 : print '%s %s %s' % (tile_loc,grid_loc,tile_type) return swc
def getSwcSswitch(direction, track, grid_loc): VERBOSE = 1 #print "S block check" #block_type = getBlockType(block) tile_type = getTileType('SBLOCK', grid_loc) tile_loc = getTileLoc('SBLOCK', grid_loc) #if tile_type=="io_el": # pdb.set_trace() #get direction partial switch #sub_swc1 = array[tile_type]['SBLOCK'][direction] sub_swc1 = chipStats().get(tile_type).get('sblock')[direction] #get track partial switch track_name = 'T' + track #sub_swc2 = array[tile_type]['SBLOCK'][track_name] sub_swc2 = chipStats().get(tile_type).get('sblock')[track_name] #switch address based on direction then adding a track based offset swc = [sub_swc1[0] + sub_swc2[0], sub_swc1[1] + sub_swc2[1]] #add block offset swc = getTileOffset(swc, tile_loc) if VERBOSE==1 or VERBOSE>1: print '%s [%s,%s] SBLOCK %s (%s %s)' % (tile_type, str(tile_loc[0]).rjust(2), str(tile_loc[1]).rjust(2), direction, str(swc[0]), str(swc[1])), if VERBOSE>1 : print '%s %s %s' % (tile_loc,grid_loc,tile_type) return swc
def getSwcCblock(pin_num, pin_grid_loc, cblock_type, track, cblock_grid_loc, net_name): #getSwcCblock(pin_num, pin_block, block_type, track, block_location) VERBOSE = 1 #0,1,2 #cblock location and tile type cblock_tile_type = getTileType(cblock_type, cblock_grid_loc) #where the CBLOCK is cblock_tile_loc = getTileLoc(cblock_type, cblock_grid_loc) #where the CBLOCK is #pin location and tile type -- pin loc independent of block type pin_tile_type = getTileType('CHANX', pin_grid_loc) #where the pin (source or sink) is pin_tile_loc = getTileLoc('CHANX', pin_grid_loc) #get net 1 name : pin name pin_num = int(pin_num) #pin_name = array[pin_tile_type]['pin names'][pin_num] pin_name = chipStats().get(pin_tile_type).pin_order[pin_num] if cblock_tile_loc != pin_tile_loc: pin_name = 'X' + pin_name #get net 2 name : track name track_name = 'T' + track #switch address is bassed on a crossbar network, pick location that # corresponds to net1 on one side and net2 on the other #sub_swc1 = array[cblock_tile_type][cblock_type][track_name] try: sub_swc1 = chipStats().get(cblock_tile_type).get(cblock_type)[track_name] except: pdb.set_trace() #sub_swc2 = array[cblock_tile_type][cblock_type][pin_name] sub_swc2 = chipStats().get(cblock_tile_type).get(cblock_type)[pin_name] swc = [sub_swc1[0] + sub_swc2[0], sub_swc1[1] + sub_swc2[1]] #add block offset swcx = getTileOffset(swc, cblock_tile_loc) if VERBOSE: print "%s [%s,%s] %s (%s,%s) %s %s (%s, %s)" % (cblock_tile_type.rjust(4), str(cblock_tile_loc[0]).rjust(2), str(cblock_tile_loc[1]).rjust(2), cblock_type, str(swc[0]), str(swc[1]), track_name, pin_name, swcx[0], swcx[1]), if VERBOSE > 1: print "CBLOCK swc: ", print cblock_type + ' <--> ' + pin_tile_type + ' ' , print cblock_type + ' in ' + str(cblock_grid_loc[0]) + ' ' + str(cblock_grid_loc[1]) , print 'on TRACK ' + str(track) + ' to pin ' + str(pin_num) , print 'in block ' + str(pin_grid_loc[0]) + ' ' + str(pin_grid_loc[1]), return swcx
def main(): global swcs swcs = list() global groutes global nblocks global luts global xarray ex_fgs_dict = dict() #extra floating-gates global ex_fgs_dict nblocks = dict() luts = dict() #---- input arguments / defaults ---- for calling VPR circuit_loc = './benchmarks/mad7' #default input run_dir = dirx + 'temp' # stores all intermediate files in VPR vpr_disp = 0 # TURN DISPLAY ON 1 else 0 arch_file = [] pins_file = [] for i in range(len(sys.argv)): if sys.argv[i] == '-c': circuit_loc = sys.argv[i + 1] if sys.argv[i] == '-d': run_dir = sys.argv[i + 1] if sys.argv[i] == '-v': vpr_disp = 1 if sys.argv[i] == '-a': arch_file = sys.argv[i + 1] if sys.argv[i] == '-p': pins_file = sys.argv[i + 1] circuit_name = circuit_loc.split('/')[-1] if not pins_file and isfile(circuit_loc + '.pads'): pins_file = circuit_loc + '.pads' print run_dir #--- main functions --- if not arch_file: arch_file = dirx + parseBlif(circuit_loc + '.blif') xarray = pbarray(len(chipStats().array.pattern), len(chipStats().array.pattern[0])) #initial import runVTR(arch_file, circuit_loc, pins_file, run_dir, vpr_disp) parseNet('%s/%s.net' % (run_dir, circuit_name)) parsePlace('%s/%s.place' % (run_dir, circuit_name)) if (pins_file): parsePads(pins_file) parseRoute('%s/%s.route' % (run_dir, circuit_name)) #also generates global interconnect switch list genLISwcs() printSwcs('%s/%s.swcs' % (run_dir, circuit_name)) saveCaps('%s/%s.caps' % (run_dir, circuit_name))
def main(): #globals are weird, apparently only need to assign global if you're modifying the variable. # not necessary to read from variable. however, i can modify the var w/o declaring it global. # anyway, just listing globals here for clarity. not for necessity. global swcs swcs = list() #pdb.set_trace() #things parsed from VTR #global pblocks global groutes global nblocks global luts global xarray #extra floating-gates ex_fgs_dict = dict() global ex_fgs_dict #pblocks = dict() nblocks = dict() luts = dict() #arch specific addresses #global array #array = arrayStats() #array_info = arrayStats() #pdb.set_trace() #******************************************************* #---- input arguments / defaults ---- for calling VPR #******************************************************* circuit_loc = './benchmarks/mad7' #default input #circuit_loc = './benchmarks/mad_vmm' #default input run_dir = dirx + 'temp' # stores all intermediate files in VPR vpr_disp = 0 # TURN DISPLAY ON 1 else 0 arch_file = [] pins_file = [] for i in range(len(sys.argv)): if sys.argv[i] == '-c': circuit_loc = sys.argv[i+1] if sys.argv[i] == '-d': run_dir = sys.argv[i+1] if sys.argv[i] == '-v': vpr_disp = 1 if sys.argv[i] == '-a': arch_file = sys.argv[i+1] if sys.argv[i] == '-p': pins_file = sys.argv[i+1] circuit_name = circuit_loc.split('/')[-1] if not pins_file and isfile(circuit_loc + '.pads'): pins_file = circuit_loc + '.pads' print run_dir #--- main functions --- if not arch_file: arch_file = dirx + parseBlif(circuit_loc + '.blif') #initial import #pdb.set_trace() I"M HEREEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE xarray = pbarray(len(chipStats().array.pattern),len(chipStats().array.pattern[0])) #could not get out of genu.py line 125 in debug mode runVTR(arch_file, circuit_loc, pins_file, run_dir, vpr_disp) parseNet('%s/%s.net'%(run_dir, circuit_name)) parsePlace('%s/%s.place'%(run_dir, circuit_name)) #pdb.set_trace() if (pins_file): parsePads(pins_file) parseRoute('%s/%s.route'%(run_dir, circuit_name)) #also generates global interconnect switch list genLISwcs() #pdb.set_trace() ##genLocalInterconnectSwcs() #have to parse everything before generating LI swcs printSwcs('%s/%s.swcs'%(run_dir, circuit_name))
def getSwcCblock(pin_num, pin_grid_loc, cblock_type, track, cblock_grid_loc, net_name): #getSwcCblock(pin_num, pin_block, block_type, track, block_location) VERBOSE = 1 #0,1,2 VERBOSE2=1 #cblock location and tile type cblock_tile_type = getTileType(cblock_type, cblock_grid_loc) #where the CBLOCK is cblock_tile_loc = getTileLoc(cblock_type, cblock_grid_loc) #where the CBLOCK is #pin location and tile type -- pin loc independent of block type pin_tile_type = getTileType('CHANX', pin_grid_loc) #where the pin (source or sink) is WAS HARDCODED TO CHANX before:: pin_tile_loc = getTileLoc(cblock_type, pin_grid_loc) if VERBOSE2>1 : print "@@***********" print "pin_tile_loc :%s" %(pin_tile_loc) print "pin_tile_type :%s" %(pin_tile_type) print "cblock_tile_loc: %s" %(cblock_tile_loc) print "cblock_grid_loc:"+str(cblock_grid_loc) print "cblock_tile_type:"+str(cblock_tile_type) #get net 1 name : pin name pin_num = int(pin_num) #pin_name = array[pin_tile_type]['pin names'][pin_num] !! #if cblock_tile_type == 'cab2': #pdb.set_trace() #if cblock_tile_type == 'io_e': # pdb.set_trace() #if pin_tile_type== 'io_e': #pdb.set_trace() # if pin_num==1: # pin_num=1 # else: # pin_num=pin_num*3 ##super--kludge$$ # pin_name = chipStats().get(pin_tile_type).pin_order[pin_num] # else: pin_name = chipStats().get(pin_tile_type).pin_order[pin_num] #pdb.set_trace() ##major change for external case: #if cblock_tile_loc != pin_tile_loc: # pin_name = 'X' + pin_name if rasp3a == 0: if cblock_tile_type == 'io_e': print "**" #pdb.set_trace() # A-A and D-D case elif cblock_grid_loc[0] in [3,5,7,9,11] and cblock_tile_loc != pin_tile_loc and (pin_tile_loc[0]-cblock_tile_loc[0] !=1) and cblock_type=='CHANY': if pin_name[0] != 'X': #pdb.set_trace() print "lala-land" #elif cblock_tile_type[:2] =="io": #print "IO BLOCK" elif cblock_tile_type != pin_tile_type: pin_name = 'X' + pin_name if pin_tile_type=='clb' and cblock_tile_type in ['cab','cab2','cab_vmm']: pin_name='D'+pin_name elif pin_tile_type in ['cab','cab2','cab_vmm'] and cblock_tile_type in ['clb']: pin_name='A'+pin_name elif cblock_tile_loc != pin_tile_loc: pin_name = 'X' + pin_name ##we need to add X for C-blocks in ## super--kludge$$ might not need it anymore elif cblock_grid_loc[0] in [5,9,12] and cblock_tile_type in ['cab','cab2','cab_vmm'] : if pin_name[0] != 'X': pin_name ='X' + pin_name print "lala-land" #pdb.set_trace() elif cblock_grid_loc[0] in [0,3,7,11] and cblock_tile_type== 'clb' : if pin_name[0] != 'X': pin_name = 'X' + pin_name print "lala-land2" #pdb.set_trace() elif rasp3a == 1: if cblock_tile_type == 'io_e': print "yeehaaa!" elif cblock_tile_type != pin_tile_type: pin_name = 'X' + pin_name if pin_tile_type=='clb' and cblock_tile_type in ['cab','cab2','cab_vmm']: pin_name='D'+pin_name elif pin_tile_type in ['cab','cab2','cab_vmm'] and cblock_tile_type in ['clb']: pin_name='A'+pin_name elif cblock_grid_loc[0] in [0,2,4,6] and cblock_tile_type in ['cab','cab2','cab_vmm'] : if pin_name[0] != 'X': pin_name ='X' + pin_name print "lala-land" elif cblock_tile_loc != pin_tile_loc: pin_name = 'X' + pin_name # #pdb.set_trace() elif cblock_grid_loc[0] in [1,3,5] and cblock_tile_type== 'clb' : if pin_name[0] != 'X': pin_name = 'X' + pin_name print "lala-land2" #pdb.set_trace() #get net 2 name : track name track_name = 'T' + track #switch address is bassed on a crossbar network, pick location that # corresponds to net1 on one side and net2 on the other #sub_swc1 = array[cblock_tile_type][cblock_type][track_name] try: sub_swc1 = chipStats().get(cblock_tile_type).get(cblock_type)[track_name] except: pdb.set_trace() #sub_swc2 = array[cblock_tile_type][cblock_type][pin_name] if VERBOSE2>1 :print "!!***********" if VERBOSE2>1 :print pin_name if VERBOSE2>1 :print cblock_type if VERBOSE2>1 :print cblock_tile_type #pdb.set_trace() try: sub_swc2 = chipStats().get(cblock_tile_type).get(cblock_type)[pin_name] except: pdb.set_trace() swc = [sub_swc1[0] + sub_swc2[0], sub_swc1[1] + sub_swc2[1]] #add block offset swc = getTileOffset(swc, cblock_tile_loc) if VERBOSE: print "%s [%s,%s] %s (%s,%s) %s %s" % (cblock_tile_type.rjust(4), str(cblock_tile_loc[0]).rjust(2), str(cblock_tile_loc[1]).rjust(2), cblock_type, str(swc[0]), str(swc[1]), track_name, pin_name), if VERBOSE > 1: print "CBLOCK swc: ", print cblock_type + ' <--> ' + pin_tile_type + ' ' , print cblock_type + ' in ' + str(cblock_grid_loc[0]) + ' ' + str(cblock_grid_loc[1]) , print 'on TRACK ' + str(track) + ' to pin ' + str(pin_num) , print 'in block ' + str(pin_grid_loc[0]) + ' ' + str(pin_grid_loc[1]), return swc
def getSwcCblock(pin_num, pin_grid_loc, cblock_type, track, cblock_grid_loc, net_name, c_outin): if cap_nams[-1] != net_name: cap_nams.append(net_name) cap_vals.append(160e-15) elif cap_nams[-1] == net_name and c_outin == 0: cap_vals[-1] = cap_vals[-1]+160e-15 cap_seq.append(1) VERBOSE = 1 #0,1,2 VERBOSE2=1 #cblock location and tile type cblock_tile_type = getTileType(cblock_type, cblock_grid_loc) #where the CBLOCK is cblock_tile_loc = getTileLoc(cblock_type, cblock_grid_loc) #where the CBLOCK is #pin location and tile type -- pin loc independent of block type pin_tile_type = getTileType('CHANX', pin_grid_loc) #where the pin (source or sink) is WAS HARDCODED TO CHANX before:: pin_tile_loc = getTileLoc(cblock_type, pin_grid_loc) if VERBOSE2>1 : print "@@***********" print "pin_tile_loc :%s" %(pin_tile_loc) print "pin_tile_type :%s" %(pin_tile_type) print "cblock_tile_loc: %s" %(cblock_tile_loc) print "cblock_grid_loc:"+str(cblock_grid_loc) print "cblock_tile_type:"+str(cblock_tile_type) pin_num = int(pin_num) pin_name = chipStats().get(pin_tile_type).pin_order[pin_num] if rasp3a == 0: if cblock_tile_type == 'io_e': print "**" # A-A and D-D case elif cblock_grid_loc[0] in [3,5,7,9,11] and cblock_tile_loc != pin_tile_loc and (pin_tile_loc[0]-cblock_tile_loc[0] !=1) and cblock_type=='CHANY': if pin_name[0] != 'X': print "lala-land" elif cblock_tile_type != pin_tile_type: pin_name = 'X' + pin_name if pin_tile_type=='clb' and cblock_tile_type in ['cab','cab2']: pin_name='D'+pin_name elif pin_tile_type in ['cab','cab2'] and cblock_tile_type in ['clb']: pin_name='A'+pin_name elif cblock_tile_loc != pin_tile_loc: pin_name = 'X' + pin_name ##we need to add X for C-blocks in ## super--kludge$$ might not need it anymore elif cblock_grid_loc[0] in [5,9,12] and cblock_tile_type in ['cab','cab2'] : if pin_name[0] != 'X': pin_name ='X' + pin_name print "lala-land" elif cblock_grid_loc[0] in [0,3,7,11] and cblock_tile_type== 'clb' : if pin_name[0] != 'X': pin_name = 'X' + pin_name print "lala-land2" elif rasp3a == 1: if cblock_tile_type == 'io_e': print "yeehaaa!" elif cblock_tile_type != pin_tile_type: pin_name = 'X' + pin_name if pin_tile_type=='clb' and cblock_tile_type in ['cab','cab2']: pin_name='D'+pin_name elif pin_tile_type in ['cab','cab2'] and cblock_tile_type in ['clb']: pin_name='A'+pin_name elif cblock_grid_loc[0] in [0,2,4,6] and cblock_tile_type in ['cab','cab2'] : if pin_name[0] != 'X': pin_name ='X' + pin_name print "lala-land" elif cblock_tile_loc != pin_tile_loc: pin_name = 'X' + pin_name elif cblock_grid_loc[0] in [1,3,5] and cblock_tile_type== 'clb' : if pin_name[0] != 'X': pin_name = 'X' + pin_name print "lala-land2" track_name = 'T' + track #switch address is bassed on a crossbar network, pick location that # corresponds to net1 on one side and net2 on the other #sub_swc1 = array[cblock_tile_type][cblock_type][track_name] try: sub_swc1 = chipStats().get(cblock_tile_type).get(cblock_type)[track_name] except: pdb.set_trace() #sub_swc2 = array[cblock_tile_type][cblock_type][pin_name] if VERBOSE2>1 :print "!!***********" if VERBOSE2>1 :print pin_name if VERBOSE2>1 :print cblock_type if VERBOSE2>1 :print cblock_tile_type try: sub_swc2 = chipStats().get(cblock_tile_type).get(cblock_type)[pin_name] except: pdb.set_trace() swc = [sub_swc1[0] + sub_swc2[0], sub_swc1[1] + sub_swc2[1]] #add block offset swc = getTileOffset(swc, cblock_tile_loc) if VERBOSE: print "%s [%s,%s] %s (%s,%s) %s %s" % (cblock_tile_type.rjust(4), str(cblock_tile_loc[0]).rjust(2), str(cblock_tile_loc[1]).rjust(2), cblock_type, str(swc[0]), str(swc[1]), track_name, pin_name), if VERBOSE > 1: print "CBLOCK swc: ", print cblock_type + ' <--> ' + pin_tile_type + ' ' , print cblock_type + ' in ' + str(cblock_grid_loc[0]) + ' ' + str(cblock_grid_loc[1]) , print 'on TRACK ' + str(track) + ' to pin ' + str(pin_num) , print 'in block ' + str(pin_grid_loc[0]) + ' ' + str(pin_grid_loc[1]), return swc
def main(): #globals are weird, apparently only need to assign global if you're modifying the variable. # not necessary to read from variable. however, i can modify the var w/o declaring it global. # anyway, just listing globals here for clarity. not for necessity. global swcs swcs = list() #pdb.set_trace() #things parsed from VTR #global pblocks global groutes global nblocks global luts global xarray #extra floating-gates ex_fgs_dict = dict() global ex_fgs_dict #pblocks = dict() nblocks = dict() luts = dict() #arch specific addresses #global array #array = arrayStats() #array_info = arrayStats() #pdb.set_trace() #******************************************************* #---- input arguments / defaults ---- for calling VPR #******************************************************* circuit_loc = './benchmarks/mad7' #default input #circuit_loc = './benchmarks/mad_vmm' #default input run_dir = dirx + 'temp' # stores all intermediate files in VPR vpr_disp = 0 # TURN DISPLAY ON 1 else 0 arch_file = [] pins_file = [] for i in range(len(sys.argv)): if sys.argv[i] == '-c': circuit_loc = sys.argv[i + 1] if sys.argv[i] == '-d': run_dir = sys.argv[i + 1] if sys.argv[i] == '-v': vpr_disp = 1 if sys.argv[i] == '-a': arch_file = sys.argv[i + 1] if sys.argv[i] == '-p': pins_file = sys.argv[i + 1] circuit_name = circuit_loc.split('/')[-1] if not pins_file and isfile(circuit_loc + '.pads'): pins_file = circuit_loc + '.pads' print run_dir #--- main functions --- if not arch_file: arch_file = dirx + parseBlif(circuit_loc + '.blif') #initial import #pdb.set_trace() I"M HEREEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEEE xarray = pbarray(len(chipStats().array.pattern), len(chipStats().array.pattern[0]) ) #could not get out of genu.py line 125 in debug mode runVTR(arch_file, circuit_loc, pins_file, run_dir, vpr_disp) parseNet('%s/%s.net' % (run_dir, circuit_name)) parsePlace('%s/%s.place' % (run_dir, circuit_name)) #pdb.set_trace() if (pins_file): parsePads(pins_file) parseRoute('%s/%s.route' % (run_dir, circuit_name)) #also generates global interconnect switch list #pdb.set_trace() genLISwcs() #pdb.set_trace() ##genLocalInterconnectSwcs() #have to parse everything before generating LI swcs printSwcs('%s/%s.swcs' % (run_dir, circuit_name)) saveCaps('%s/%s.caps' % (run_dir, circuit_name))
def main(): #globals are weird, apparently only need to assign global if you're modifying the variable. # not necessary to read from variable. however, i can modify the var w/o declaring it global. # anyway, just listing globals here for clarity. not for necessity. global swcs swcs = list() #things parsed from VTR #global pblocks global groutes global nblocks global luts global xarray global ex_fgs_dict ex_fgs_dict = dict() #pblocks = dict() nblocks = dict() luts = dict() #arch specific addresses #global array #array = arrayStats() #array_info = arrayStats() xarray = pbarray(len(chipStats().array.pattern),len(chipStats().array.pattern[0])) #---- input arguments / defaults ---- #circuit_loc = './benchmarks/mad_vmm' #default input #circuit_loc = './benchmarks/mad7' #default input circuit_loc = './benchmarks/pad2pad3' run_dir = dirx + './temp' vpr_disp = 0 arch_file = [] pins_file = [] for i in range(len(sys.argv)): if sys.argv[i] == '-c': circuit_loc = sys.argv[i+1] if sys.argv[i] == '-d': run_dir = sys.argv[i+1] if sys.argv[i] == '-v': vpr_disp = 1 if sys.argv[i] == '-a': arch_file = sys.argv[i+1] if sys.argv[i] == '-p': pins_file = sys.argv[i+1] circuit_name = circuit_loc.split('/')[-1] if not pins_file and isfile(circuit_loc + '.pads'): pins_file = circuit_loc + '.pads' print run_dir #--- main functions --- if not arch_file: arch_file = dirx + parseBlif(circuit_loc + '.blif') runVTR(arch_file, circuit_loc, pins_file, run_dir, vpr_disp) parseNet('%s/%s.net'%(run_dir, circuit_name)) parsePlace('%s/%s.place'%(run_dir, circuit_name)) parsePads(pins_file) parseRoute('%s/%s.route'%(run_dir, circuit_name)) #also generates global interconnect switch list genLISwcs() printSwcs('%s/%s.swcs'%(run_dir, circuit_name)) #print xarray #xarray.getSub(2,1).printSubs() #xarray.getSub(2,1).dispLI() #xarray.getSub(1,1).dispLI() #xarray.getSub(1,1).genDevFgs() #xarray.getSub(2,1).genDevFgs() #xarray.getSub(1,0).printSubs() #xarray.getSub(1,0).genLI() #xarray.getSub(1,0).genDevFgs() for i in swcs: print '%g %g'%(i[0], i[1]) print 'deal with it...'