This repository contains test and wrapper scripts for USB IP cores, implemented using cocotb and cocotb_usb.
You should use the parent repository and follow the steps there to ensure the correct folder structure is maintained. This will also take care of the dependencies.
- LiteX
- iverilog
- python3 and pip
- cocotb
- cocotb_usb package
Execution is controlled by Makefile. To execute tests with default values, use:
make sim
Test output is saved to a results.xml
file. Signal states are stored in dump.vcd
.
If you want to switch targets, make sure to run make clean
.
Basic options that can be set:
TEST_SCRIPT
- name of script from the tests directory to be executed, without the.py
extension. Default istest-enum
.TARGET
- IP core to be tested. Currentlyvalentyusb
(default),usb1device
andfoboot
are supported.TARGET_OPTIONS
- in case some are availablw in the wrapper script.
Other makefile targets:
decode
- export USB transactions to ausb.pcap
file to be viewed i.e. in Wireshark. USB line states are saved tousb.vcd
.
For example to run the Windows 10 enumeration test on Foboot core, use:
make TARGET=foboot TEST_SCRIPT=test-w10enum sim
Signal traces are saved in the .vcd
format. They can be viewed using GTKWave.
In order to decode USB signals, sigrok decodes are used. You can obtain sigrok-cli
and libsigrokdecode
from its website or use a conda package. Note that packages provided by your repository manager may be out-of-date, which can lead to significantly longer decoding times.