def __init__(self, architecture_mode=ARCH_ARM_MODE_THUMB, translation_mode=FULL_TRANSLATION): super(ArmTranslator, self).__init__() # Set *Architecture Mode*. The translation of each instruction # into the REIL language is based on this. self._arch_mode = architecture_mode # An instance of *ArchitectureInformation*. self._arch_info = ArmArchitectureInformation(architecture_mode) # Set *Translation Mode*. self._translation_mode = translation_mode # An instance of a *VariableNamer*. This is used so all the # temporary REIL registers are unique. self._ir_name_generator = VariableNamer("t", separator="") self._builder = ReilInstructionBuilder() self._flags = { "nf": ReilRegisterOperand("nf", 1), "zf": ReilRegisterOperand("zf", 1), "cf": ReilRegisterOperand("cf", 1), "vf": ReilRegisterOperand("vf", 1), } if self._arch_mode in [ARCH_ARM_MODE_ARM, ARCH_ARM_MODE_THUMB]: self._sp = ReilRegisterOperand("r13", 32) # TODO: Implement alias self._pc = ReilRegisterOperand("r15", 32) self._lr = ReilRegisterOperand("r14", 32) self._ws = ReilImmediateOperand(4, 32) # word size
def setUp(self): self.trans_mode = FULL_TRANSLATION self.arch_mode = ARCH_ARM_MODE_THUMB self.arch_info = ArmArchitectureInformation(self.arch_mode) self.arm_parser = ArmParser(self.arch_mode) self.arm_translator = ArmTranslator(self.arch_mode, self.trans_mode) self.reil_emulator = ReilEmulator(self.arch_info) self.context_filename = "failing_context.data"
def get_arch(binary): if binary.architecture == ARCH_X86: return X86ArchitectureInformation( architecture_mode=binary.architecture_mode) elif binary.architecture == ARCH_ARM: return ArmArchitectureInformation( architecture_mode=binary.architecture_mode) else: raise Exception("Architecture not supported.")
def __init__(self, architecture_mode=ARCH_ARM_MODE_THUMB): super(ArmDisassembler, self).__init__() self._arch_mode = architecture_mode self._arch_info = ArmArchitectureInformation(architecture_mode) self._avaliable_disassemblers = {} self.__setup_available_disassemblers() # TODO: define default disassembler externally self._disassembler = self._avaliable_disassemblers[architecture_mode]
def test_emulate_arm(self): binary = BinaryFile(get_full_path("./samples/bin/loop-simple.arm")) arch_mode = ARCH_ARM_MODE_ARM arch_info = ArmArchitectureInformation(arch_mode) ir_emulator = ReilEmulator(arch_info) disassembler = ArmDisassembler(architecture_mode=ARCH_ARM_MODE_ARM) ir_translator = ArmTranslator(architecture_mode=ARCH_ARM_MODE_ARM) emu = Emulator(arch_info, ir_emulator, ir_translator, disassembler) emu.load_binary(binary) emu.emulate(0x10400, 0x10460, {}, None, True)
def setUp(self): self.trans_mode = FULL_TRANSLATION self.arch_mode = ARCH_ARM_MODE_32 self.arch_info = ArmArchitectureInformation(self.arch_mode) self.arm_parser = ArmParser(self.arch_mode) self.arm_translator = ArmTranslator(self.arch_mode, self.trans_mode) self.reil_emulator = ReilEmulator(self.arch_info.address_size) self.reil_emulator.set_arch_registers(self.arch_info.registers_gp_all) self.reil_emulator.set_arch_registers_size( self.arch_info.registers_size) self.reil_emulator.set_reg_access_mapper(self.arch_info.alias_mapper) self.context_filename = "failing_context.data"
def setUp(self): self._arch_info = ArmArchitectureInformation(ARCH_ARM_MODE_ARM) self._smt_solver = SmtSolver() self._smt_translator = SmtTranslator(self._smt_solver, self._arch_info.address_size) self._ir_emulator = ReilEmulator(self._arch_info) self._smt_translator.set_arch_alias_mapper( self._arch_info.alias_mapper) self._smt_translator.set_arch_registers_size( self._arch_info.registers_size) self._code_analyzer = CodeAnalyzer(self._smt_solver, self._smt_translator, self._arch_info) self._g_classifier = GadgetClassifier(self._ir_emulator, self._arch_info) self._g_verifier = GadgetVerifier(self._code_analyzer, self._arch_info)
def __init__(self, ir_name_generator, architecture_mode): super(ArmTranslationBuilder, self).__init__(ir_name_generator, ArmArchitectureInformation(architecture_mode))
def __init__(self, architecture_mode=ARCH_ARM_MODE_THUMB): global arch_info arch_info = ArmArchitectureInformation(architecture_mode) self._cache = {}
def __init__(self, architecture_mode=ARCH_ARM_MODE_32): global arch_info, modifier_size arch_info = ArmArchitectureInformation(architecture_mode) self._cache = {}