def setUp(self):
pyrtl.reset_working_block()
bitwidth = 3
self.r = pyrtl.Register(bitwidth=bitwidth, name='r')
self.result = _basic_add(self.r,
pyrtl.Const(1).zero_extended(bitwidth))
self.r.next <<= self.result
def test_romblock_does_not_throw_error(self):
from pyrtl.corecircuits import _basic_add
a = pyrtl.Input(bitwidth=3, name='a')
b = pyrtl.Input(bitwidth=3, name='b')
o = pyrtl.Output(bitwidth=3, name='o')
res = _basic_add(a,b)
rdat = {0: 1, 1: 2, 2: 5, 5: 0}
mixtable = pyrtl.RomBlock(addrwidth=3, bitwidth=3, pad_with_zeros=True, romdata=rdat)
o <<= mixtable[res[:-1]]
with io.StringIO() as testbuffer:
pyrtl.output_to_verilog(testbuffer)
def test_romblock_does_not_throw_error(self):
from pyrtl.corecircuits import _basic_add
a = pyrtl.Input(bitwidth=3, name='a')
b = pyrtl.Input(bitwidth=3, name='b')
o = pyrtl.Output(bitwidth=3, name='o')
res = _basic_add(a,b)
rdat = {0: 1, 1: 2, 2: 5, 5: 0}
mixtable = pyrtl.RomBlock(addrwidth=3, bitwidth=3, romdata=rdat)
o <<= mixtable[res[:-1]]
with io.StringIO() as testbuffer:
pyrtl.output_to_verilog(testbuffer)
def setUp(self):
pyrtl.reset_working_block()
bitwidth = 3
self.r = pyrtl.Register(bitwidth=bitwidth, name='r')
self.result = _basic_add(self.r, pyrtl.Const(1).zero_extended(bitwidth))
self.r.next <<= self.result