def execute_ldr( s, inst ): if condition_passed( s, inst.cond ): addr = addressing_mode_2( s, inst ) # TODO: support multiple memory accessing modes? # MemoryAccess( s.B, s.E ) # TODO: handle memory alignment? # CP15_reg1_Ubit checks if the MMU is enabled # if (CP15_reg1_Ubit == 0): # data = Memory[address,4] Rotate_Right (8 * address[1:0]) # else # data = Memory[address,4] data = s.mem.read( addr, 4 ) if inst.rd == 15: s.rf[PC] = data & 0xFFFFFFFE s.T = data & 0b1 return else: s.rf[ inst.rd ] = data s.rf[PC] = s.fetch_pc() + 4
def execute_ldr(s, inst): if condition_passed(s, inst.cond()): addr = addressing_mode_2(s, inst) # TODO: support multiple memory accessing modes? # MemoryAccess( s.B, s.E ) # TODO: handle memory alignment? # CP15_reg1_Ubit checks if the MMU is enabled # if (CP15_reg1_Ubit == 0): # data = Memory[address,4] Rotate_Right (8 * address[1:0]) # else # data = Memory[address,4] data = s.mem.read(addr, 4) if inst.rd() == 15: s.rf[PC] = data & 0xFFFFFFFE s.T = data & 0b1 return else: s.rf[inst.rd()] = data s.rf[PC] = s.fetch_pc() + 4
def execute_strb(s, inst): if condition_passed(s, inst.cond()): addr = addressing_mode_2(s, inst) s.mem.write(addr, 1, trim_8(s.rf[inst.rd()])) s.rf[PC] = s.fetch_pc() + 4
def execute_strb( s, inst ): if condition_passed( s, inst.cond ): addr = addressing_mode_2( s, inst ) s.mem.write( addr, 1, trim_8( s.rf[ inst.rd ] ) ) s.rf[PC] = s.fetch_pc() + 4
def execute_str(s, inst): if condition_passed(s, inst.cond()): addr = addressing_mode_2(s, inst) # TODO: support multiple memory accessing modes? # MemoryAccess( s.B, s.E ) s.mem.write(addr, 4, s.rf[inst.rd()]) s.rf[PC] = s.fetch_pc() + 4
def execute_str( s, inst ): if condition_passed( s, inst.cond ): addr = addressing_mode_2( s, inst ) # TODO: support multiple memory accessing modes? # MemoryAccess( s.B, s.E ) s.mem.write( addr, 4, s.rf[ inst.rd ] ) s.rf[PC] = s.fetch_pc() + 4
def execute_ldrb(s, inst): if condition_passed(s, inst.cond()): if inst.rd() == 15: raise FatalError('UNPREDICTABLE') addr = addressing_mode_2(s, inst) # TODO: support multiple memory accessing modes? # MemoryAccess( s.B, s.E ) s.rf[inst.rd()] = s.mem.read(addr, 1) s.rf[PC] = s.fetch_pc() + 4
def execute_ldrb( s, inst ): if condition_passed( s, inst.cond ): if inst.rd == 15: raise FatalError('UNPREDICTABLE') addr = addressing_mode_2( s, inst ) # TODO: support multiple memory accessing modes? # MemoryAccess( s.B, s.E ) s.rf[ inst.rd ] = s.mem.read( addr, 1 ) s.rf[PC] = s.fetch_pc() + 4