def run(self, n_receive=None):
"""
Run the simulation.
Args:
n_receive: Stop after receiving this many samples.
"""
b100.set_image(self.fpgaimage)
# steps_rqd only in for compatibility
from gnuradio import gr, uhd
if n_receive is None:
n_receive = 10000
# Flip high and low bits of in_raw
flipped_raw = flip_bits(self.in_raw, self.width)
flipped_raw = unsigned_to_signed(flipped_raw, self.width)
stream_args = uhd.stream_args(cpu_format='sc16', channels=range(1))
from_usrp = uhd.usrp_source(device_addr='', stream_args=stream_args)
head = gr.head(4, n_receive)
snk = gr.vector_sink_i()
to_usrp = uhd.usrp_sink(device_addr='', stream_args=stream_args)
src = gr.vector_source_i(flipped_raw)
tb = gr.top_block()
tb.connect(from_usrp, head, snk)
tb.connect(src, to_usrp)
tb.run()
self.out_raw = snk.data()
# Remove 0's
start_offset = None
stop_offset = None
enumerated_raw = list(enumerate(self.out_raw))
for i, r in enumerated_raw:
if r != 0:
start_offset = i
break
for i, r in reversed(enumerated_raw):
if r != 0:
stop_offset = i
break
if start_offset is None or stop_offset is None:
raise StandardError("Could not find any non-zero returned data.")
self.out_raw = self.out_raw[start_offset:stop_offset + 1]
# Shift to positive integers
positive = []
for r in self.out_raw:
if r < 0:
r += pow(2, self.width)
positive.append(r)
self.out_raw = positive
# Flip bits in out_raw
self.out_raw = flip_bits(self.out_raw, self.width)
if self.output_msgs:
header_shift = pow(2, self.width - 1)
samples, packets = stream_to_samples_and_packets(self.out_raw)
self.out_samples = [
int_to_c(s, self.width / 2 - 1) for s in samples
]
self.out_messages = packets
def run(self, clks):
"""
Run a test bench simulation.
"""
TestBenchIcarusBase.run(self, clks)
self.out_samples = [int_to_c(r, self.width / 2) for r in self.out_raw]
samples, packets = stream_to_samples_and_packets(self.out_msgs)
if samples:
raise StandardError("Found samples is message stream.")
self.out_messages = packets
def run(self, steps_rqd):
super(TestBenchIcarusOuter, self).run(steps_rqd)
header_shift = pow(2, self.width-1)
if self.output_msgs:
samples, packets = stream_to_samples_and_packets(self.out_raw)
for s in samples:
if s == config.errorcode:
raise ValueError("Errorcode detected.")
self.out_samples = [int_to_c(s, self.width/2-1) for s in samples]
self.out_messages = packets
def run(self, clks):
"""
Run a test bench simulation.
"""
TestBenchIcarusBase.run(self, clks)
self.out_samples = [int_to_c(r, self.width/2) for r in self.out_raw]
samples, packets = stream_to_samples_and_packets(self.out_msgs)
if samples:
raise StandardError("Found samples is message stream.")
self.out_messages = packets
def run(self, n_receive=None):
"""
Run the simulation.
Args:
n_receive: Stop after receiving this many samples.
"""
b100.set_image(self.fpgaimage)
# steps_rqd only in for compatibility
from gnuradio import gr, uhd
if n_receive is None:
n_receive = 10000
# Flip high and low bits of in_raw
flipped_raw = flip_bits(self.in_raw, self.width)
flipped_raw = unsigned_to_signed(flipped_raw, self.width)
stream_args = uhd.stream_args(cpu_format='sc16', channels=range(1))
from_usrp = uhd.usrp_source(device_addr='', stream_args=stream_args)
head = gr.head(4, n_receive)
snk = gr.vector_sink_i()
to_usrp = uhd.usrp_sink(device_addr='', stream_args=stream_args)
src = gr.vector_source_i(flipped_raw)
tb = gr.top_block()
tb.connect(from_usrp, head, snk)
tb.connect(src, to_usrp)
tb.run()
self.out_raw = snk.data()
# Remove 0's
start_offset = None
stop_offset = None
enumerated_raw = list(enumerate(self.out_raw))
for i, r in enumerated_raw:
if r != 0:
start_offset = i
break
for i, r in reversed(enumerated_raw):
if r != 0:
stop_offset = i
break
if start_offset is None or stop_offset is None:
raise StandardError("Could not find any non-zero returned data.")
self.out_raw = self.out_raw[start_offset: stop_offset+1]
# Shift to positive integers
positive = []
for r in self.out_raw:
if r < 0:
r += pow(2, self.width)
positive.append(r)
self.out_raw = positive
# Flip bits in out_raw
self.out_raw = flip_bits(self.out_raw, self.width)
if self.output_msgs:
header_shift = pow(2, self.width-1)
samples, packets = stream_to_samples_and_packets(self.out_raw)
self.out_samples = [int_to_c(s, self.width/2-1) for s in samples]
self.out_messages = packets
def run(self, steps_rqd):
super(TestBenchIcarusOuter, self).run(steps_rqd)
header_shift = pow(2, self.width - 1)
if self.output_msgs:
samples, packets = stream_to_samples_and_packets(self.out_raw)
for s in samples:
if s == config.errorcode:
raise ValueError("Errorcode detected.")
self.out_samples = [
int_to_c(s, self.width / 2 - 1) for s in samples
]
self.out_messages = packets
def test_one(self):
"""
Test the butterfly module.
"""
sendnth = 5
n_data = 1
width = 32
in_samples = []
expected = []
xas = [
random.random() * 2 - 1 + random.random() * 2j - 1j
for i in range(n_data)
]
xbs = [
random.random() * 2 - 1 + random.random() * 2j - 1j
for i in range(n_data)
]
# Max val of w is 10000 (roughly 0.5)
ws = [
0.5 * (random.random() * 2 - 1) + 0.5 * (random.random() * 2j - 1j)
for i in range(n_data)
]
for xa, xb, w in zip(xas, xbs, ws):
in_samples.append(xa)
in_samples.append(xb)
in_samples.append(w)
ya = xa + xb * w
yb = xa - xb * w
expected.append(ya / 2)
expected.append(yb / 2)
steps_rqd = len(in_samples) * sendnth * 2 + 100
# Define meta data
mwidth = 1
raw_ms = [random.randint(0, pow(2, mwidth) - 1) for i in range(n_data)]
in_ms = []
expected_ms = []
for m in raw_ms:
in_ms.extend((m, 0, 0))
expected_ms.extend((m, 0))
defines = config.updated_defines({
'DEBUG': True,
})
executable_inner = buildutils.generate_icarus_executable(
'fft', 'butterfly_inner', '-test', defines=defines)
executable_outer = buildutils.generate_icarus_executable(
'fft', 'butterfly', '-test', defines=defines)
#fpgaimage = buildutils.generate_B100_image(
# 'fft', 'butterfly', '-test', defines=defines)
tb_icarus_inner = TestBenchIcarusInner(executable_inner,
in_samples,
in_ms,
sendnth=sendnth)
tb_icarus_outer = TestBenchIcarusOuter(executable_outer,
in_samples,
sendnth=sendnth)
#tb_b100 = TestBenchB100(fpgaimage, in_samples)
for tb, steps, check_ms in (
(tb_icarus_inner, steps_rqd, True),
(tb_icarus_outer, steps_rqd, False),
#(tb_b100, 100000, False),
):
tb.run(steps)
# Confirm that our data is correct.
print(tb.out_raw)
print(tb.out_samples)
print(expected)
self.assertEqual(len(tb.out_samples), len(expected))
for msg in tb.out_messages:
print("message is")
print(msg)
xa = int_to_c(msg[1], width / 2 - 1)
xbw = int_to_c(msg[2], width / 2 - 1)
ya = int_to_c(msg[3], width / 2 - 1)
yb = int_to_c(msg[4], width / 2 - 1)
print("e xa is {0} xbw is {1}".format(xas[0] / 2,
xbs[0] * ws[0] / 2))
print("r xa is {0} xbw is {1}".format(xa, xbw))
for r, e in zip(tb.out_samples, expected):
print(e, r)
self.assertAlmostEqual(e, r, 3)
if check_ms:
self.assertEqual(len(tb.out_ms), len(expected_ms))
for r, e in zip(tb.out_ms, expected_ms):
self.assertEqual(e, r)
def test_one(self):
"""
Test the butterfly module.
"""
sendnth = 5
n_data = 1
width = 32
in_samples = []
expected = []
xas = [random.random()*2-1 + random.random()*2j-1j for i in range(n_data)]
xbs = [random.random()*2-1 + random.random()*2j-1j for i in range(n_data)]
# Max val of w is 10000 (roughly 0.5)
ws = [0.5*(random.random()*2-1) + 0.5*(random.random()*2j-1j) for i in range(n_data)]
for xa, xb, w in zip(xas, xbs, ws):
in_samples.append(xa)
in_samples.append(xb)
in_samples.append(w)
ya = xa + xb*w
yb = xa - xb*w
expected.append(ya/2)
expected.append(yb/2)
steps_rqd = len(in_samples)*sendnth*2 + 100
# Define meta data
mwidth = 1
raw_ms = [random.randint(0, pow(2,mwidth)-1) for i in range(n_data)]
in_ms = []
expected_ms = []
for m in raw_ms:
in_ms.extend((m, 0, 0))
expected_ms.extend((m, 0))
defines = config.updated_defines({
'DEBUG': True,
})
executable_inner = buildutils.generate_icarus_executable(
'fft', 'butterfly_inner', '-test', defines=defines)
executable_outer = buildutils.generate_icarus_executable(
'fft', 'butterfly', '-test', defines=defines)
#fpgaimage = buildutils.generate_B100_image(
# 'fft', 'butterfly', '-test', defines=defines)
tb_icarus_inner = TestBenchIcarusInner(executable_inner, in_samples, in_ms, sendnth=sendnth)
tb_icarus_outer = TestBenchIcarusOuter(executable_outer, in_samples, sendnth=sendnth)
#tb_b100 = TestBenchB100(fpgaimage, in_samples)
for tb, steps, check_ms in (
(tb_icarus_inner, steps_rqd, True),
(tb_icarus_outer, steps_rqd, False),
#(tb_b100, 100000, False),
):
tb.run(steps)
# Confirm that our data is correct.
print(tb.out_raw)
print(tb.out_samples)
print(expected)
self.assertEqual(len(tb.out_samples), len(expected))
for msg in tb.out_messages:
print("message is")
print(msg)
xa = int_to_c(msg[1], width/2-1)
xbw = int_to_c(msg[2], width/2-1)
ya = int_to_c(msg[3], width/2-1)
yb = int_to_c(msg[4], width/2-1)
print("e xa is {0} xbw is {1}".format(xas[0]/2, xbs[0]*ws[0]/2))
print("r xa is {0} xbw is {1}".format(xa, xbw))
for r, e in zip(tb.out_samples, expected):
print(e, r)
self.assertAlmostEqual(e, r, 3)
if check_ms:
self.assertEqual(len(tb.out_ms), len(expected_ms))
for r, e in zip(tb.out_ms, expected_ms):
self.assertEqual(e, r)