def __init__(self):
super().__init__()
# Inputs
self.i_en = Signal()
self.i_l = Rgb565()
self.i_h = Rgb565()
self.i_frame_done = Signal()
# Outputs
self.o_nz = Signal(18)
def __init__(self):
# Inputs
self.i = Rgb565()
self.i_valid = Signal()
self.i_ready = Signal()
# Outputs
self.o = Rgb565()
self.o_valid = Signal()
self.o_ready = Signal()
def __init__(self):
super().__init__()
# Inputs
self.i_avg_valid = Signal()
self.i_frame_done = Signal()
self.i_x = Signal(9)
self.i_y = Signal(9)
self.i_roi = Roi()
# Outputs
self.o_min = Rgb565()
self.o_max = Rgb565()
self.o_avg = Rgb565()
def process():
i_p = 1
ip = Rgb565(reset=(i_p, 0, 0))
for i in range(50):
yield dut.i_valid.eq(1)
yield dut.i_ready.eq(1)
yield dut.i.eq(ip)
yield
o_ready = yield dut.o_ready
o_valid = yield dut.o_valid
o_y = yield dut.o_y
o_x = yield dut.o_x
o_p = yield dut.o
eof = yield dut.o_eof
if o_valid:
print("Output:", o_ready, eof, (o_y, o_x), o_p)
if o_ready:
i_p += 1
ip = Rgb565(reset=(i_p, 0, 0))
def elaborate(self, platform):
m = Module()
p_s = Signal(13)
p_th = Signal(6)
def connect(c, ch):
m.d.comb += [
c.i_p.eq(ch),
c.i_valid.eq(self.i_valid),
c.i_ready.eq(self.i_ready),
c.i_reset.eq(self.i_reset)
]
def select(c_r, c_g, c_b):
m.d.comb += [
self.o.r.eq(c_r),
self.o.g.eq(c_g),
self.o.b.eq(c_b)
]
# Identity
k_ident = Array([0,0,0,
0,1,0,
0,0,0])
sh_ident = 0
# Edge detection
k_edge = Array([-1,-1,-1,
-1, 8,-1,
-1,-1,-1])
sh_edge = 0
# Sharpen
k_sharp = Array([ 0,-1, 0,
-1, 5,-1,
0,-1, 0])
sh_sharp=0
# Guassian blur
k_blur = Array([1, 2 , 1,
2, 4, 2,
1, 2, 1])
sh_blur = 4
# Box blur
k_box = Array([1, 1, 1,
1, 1, 1,
1, 1, 1])
sh_box = 3
# Emboss
k_emboss = Array([-2, -1, 0,
-1, 1, 1,
0 , 1, 2])
sh_emboss = 0
# Adjust color balance (not used)
k_bal = Array([0,0,0,
0,3,0,
0,0,0])
sh_bal = 2
i = Rgb565()
m.d. comb += [
i.eq(self.i),
]
# Create the convolution modules
m.submodules.blur_r = blur_r = Conv3(k_blur, w=self.res_x, h=self.res_y, dw=5,sh=sh_blur)
m.submodules.blur_g = blur_g = Conv3(k_blur, w=self.res_x, h=self.res_y, dw=6,sh=sh_blur)
m.submodules.blur_b = blur_b = Conv3(k_blur, w=self.res_x, h=self.res_y, dw=5,sh=sh_blur)
connect(blur_r, i.r)
connect(blur_g, i.g)
connect(blur_b, i.b)
m.submodules.box_r = box_r = Conv3(k_box, w=self.res_x, h=self.res_y, dw=5,sh=sh_box,same=1)
m.submodules.box_g = box_g = Conv3(k_box, w=self.res_x, h=self.res_y, dw=6,sh=sh_box,same=1)
m.submodules.box_b = box_b = Conv3(k_box, w=self.res_x, h=self.res_y, dw=5,sh=sh_box,same=1)
connect(box_r, i.r)
connect(box_g, i.g)
connect(box_b, i.b)
m.submodules.edge_r = edge_r = Conv3(k_edge, w=self.res_x, h=self.res_y, dw=5,sh=sh_edge)
m.submodules.edge_g = edge_g = Conv3(k_edge, w=self.res_x, h=self.res_y, dw=6,sh=sh_edge)
m.submodules.edge_b = edge_b = Conv3(k_edge, w=self.res_x, h=self.res_y, dw=5,sh=sh_edge)
connect(edge_r, i.r)
connect(edge_g, i.g)
connect(edge_b, i.b)
m.submodules.sharp_r = sharp_r = Conv3(k_sharp, w=self.res_x, h=self.res_y, dw=5,sh=sh_sharp,same=1)
m.submodules.sharp_g = sharp_g = Conv3(k_sharp, w=self.res_x, h=self.res_y, dw=6,sh=sh_sharp,same=1)
m.submodules.sharp_b = sharp_b = Conv3(k_sharp, w=self.res_x, h=self.res_y, dw=5,sh=sh_sharp,same=1)
connect(sharp_r, i.r)
connect(sharp_g, i.g)
connect(sharp_b, i.b)
m.submodules.emboss_r = emboss_r = Conv3(k_emboss, w=self.res_x, h=self.res_y, dw=5,sh=sh_emboss,same=1)
m.submodules.emboss_g = emboss_g = Conv3(k_emboss, w=self.res_x, h=self.res_y, dw=6,sh=sh_emboss,same=1)
m.submodules.emboss_b = emboss_b = Conv3(k_emboss, w=self.res_x, h=self.res_y, dw=5,sh=sh_emboss,same=1)
connect(emboss_r, i.r)
connect(emboss_g, i.g)
connect(emboss_b, i.b)
m.submodules.ident_r = ident_r = Conv3(k_ident, w=self.res_x, h=self.res_y, dw=5,sh=sh_ident,same=1)
m.submodules.ident_g = ident_g = Conv3(k_ident, w=self.res_x, h=self.res_y, dw=6,sh=sh_ident,same=1)
m.submodules.ident_b = ident_b = Conv3(k_ident, w=self.res_x, h=self.res_y, dw=5,sh=sh_ident,same=1)
connect(ident_r, i.r)
connect(ident_g, i.g)
connect(ident_b, i.b)
# Any channel can be used for these outputs
m.d.comb += [
self.o_ready.eq(ident_r.o_ready & self.i_ready),
self.o_valid.eq(ident_r.o_valid),
self.o_x.eq(ident_r.o_x),
self.o_y.eq(ident_r.o_y),
self.o_frame_done.eq(ident_r.frame_done)
]
# Select the required convolution
with m.Switch(self.i_sel):
with m.Case(1):
select(box_r.o_p, box_g.o_p, box_b.o_p)
with m.Case(2):
select(blur_r.o_p, blur_g.o_p, blur_b.o_p)
with m.Case(3):
select(sharp_r.o_p, sharp_g.o_p, sharp_b.o_p)
with m.Case(4):
select(emboss_r.o_p, emboss_g.o_p, emboss_b.o_p)
with m.Case(5):
select(edge_r.o_p, edge_g.o_p, edge_b.o_p)
with m.Default():
select(ident_r.o_p, ident_g.o_p, ident_b.o_p)
return m
def elaborate(self, platform):
# VGA constants
pixel_f = self.timing.pixel_freq
hsync_front_porch = self.timing.h_front_porch
hsync_pulse_width = self.timing.h_sync_pulse
hsync_back_porch = self.timing.h_back_porch
vsync_front_porch = self.timing.v_front_porch
vsync_pulse_width = self.timing.v_sync_pulse
vsync_back_porch = self.timing.v_back_porch
# Pins
clk25 = platform.request("clk25")
ov7670 = platform.request("ov7670")
led = [platform.request("led", i) for i in range(8)]
leds = Cat([i.o for i in led])
led8_2 = platform.request("led8_2")
leds8_2 = Cat([led8_2.leds[i] for i in range(8)])
led8_3 = platform.request("led8_3")
leds8_3 = Cat([led8_3.leds[i] for i in range(8)])
leds16 = Cat(leds8_3, leds8_2)
btn1 = platform.request("button_fire", 0)
btn2 = platform.request("button_fire", 1)
up = platform.request("button_up", 0)
down = platform.request("button_down", 0)
pwr = platform.request("button_pwr", 0)
left = platform.request("button_left", 0)
right = platform.request("button_right", 0)
sw = Cat([platform.request("switch", i) for i in range(4)])
uart = platform.request("uart")
divisor = int(platform.default_clk_frequency // 460800)
esp32 = platform.request("esp32_spi")
csn = esp32.csn
sclk = esp32.sclk
copi = esp32.copi
cipo = esp32.cipo
m = Module()
# Clock generator.
m.domains.sync = cd_sync = ClockDomain("sync")
m.domains.pixel = cd_pixel = ClockDomain("pixel")
m.domains.shift = cd_shift = ClockDomain("shift")
m.submodules.ecp5pll = pll = ECP5PLL()
pll.register_clkin(clk25, platform.default_clk_frequency)
pll.create_clkout(cd_sync, platform.default_clk_frequency)
pll.create_clkout(cd_pixel, pixel_f)
pll.create_clkout(cd_shift, pixel_f * 5.0 * (1.0 if self.ddr else 2.0))
# Add CamRead submodule
camread = CamRead()
m.submodules.camread = camread
# Camera config
cam_x_res = 640
cam_y_res = 480
camconfig = CamConfig()
m.submodules.camconfig = camconfig
# Connect the camera pins and config and read modules
m.d.comb += [
ov7670.cam_RESET.eq(1),
ov7670.cam_PWON.eq(0),
ov7670.cam_XCLK.eq(clk25.i),
ov7670.cam_SIOC.eq(camconfig.sioc),
ov7670.cam_SIOD.eq(camconfig.siod),
camconfig.start.eq(btn1),
camread.p_data.eq(Cat([ov7670.cam_data[i] for i in range(8)])),
camread.href.eq(ov7670.cam_HREF),
camread.vsync.eq(ov7670.cam_VSYNC),
camread.p_clock.eq(ov7670.cam_PCLK)
]
# Create the uart
m.submodules.serial = serial = AsyncSerial(divisor=divisor, pins=uart)
# Frame buffer
x_res = cam_x_res // 2
y_res = cam_y_res
buffer = Memory(width=16, depth=x_res * y_res)
m.submodules.r = r = buffer.read_port()
m.submodules.w = w = buffer.write_port()
# Button debouncers
m.submodules.debup = debup = Debouncer()
m.submodules.debdown = debdown = Debouncer()
m.submodules.debosd = debosd = Debouncer()
m.submodules.debsel = debsel = Debouncer()
m.submodules.debsnap = debsnap = Debouncer()
m.submodules.debhist = debhist = Debouncer()
# Connect the buttons to debouncers
m.d.comb += [
debup.btn.eq(up),
debdown.btn.eq(down),
debosd.btn.eq(pwr),
debsel.btn.eq(right),
debsnap.btn.eq(left),
debhist.btn.eq(btn2)
]
# Image processing configuration registers
flip = Signal(2, reset=1) # Flip the image horizontally or vertically
mono_en = Signal(reset=0) # Convert to monochrome
invert = Signal(reset=0) # Invert monochrome image
thresh_en = Signal(reset=0) # Apply threshold to monochrome image
threshold = Signal(8, reset=0) # Threshold value
border = Signal(reset=0) # Use OSD to show a border
filt_en = Signal(reset=0) # Apply a color filter
l = Rgb565(reset=(18, 12, 6)) # Image filter low values
h = Rgb565(reset=(21, 22, 14)) # Image filter high values
grid = Signal(reset=0) # Use OSD to show a grid
hist_view = Signal(reset=1) # Switch to histogram view
hist_chan = Signal(2, reset=0) # The histogram channel to calculate
ccr = CC(reset=(0, 0, 18, 12, 16)) # Color control record
sharpness = Signal(
unsigned(4), reset=0
) # Used to select image convolution kernel for blur/sharpness
roi = Roi() # Region on interest
frozen = Signal(reset=1) # Freeze/unfreeze video display
sat_en = Signal()
saturation = Signal(5, reset=16)
# Control synchronization of camera with fifo
sync_fifo = Signal(reset=0)
# OSD control signals
osd_val = Signal(
4, reset=0) # Account for spurious start-up button pushes
osd_on = Signal(reset=1)
osd_sel = Signal(reset=1)
# Snapshot signals
snap = Signal(reset=0)
writing = Signal(reset=0)
written = Signal(reset=0)
byte = Signal(reset=0)
w_addr = Signal(18)
# Signals for calculating histogram
hist_val = Signal(6)
# Signals for displaying histogram
hist_color = Signal(8)
hbin = Signal(6, reset=0)
bin_cnt = Signal(5, reset=0)
old_x = Signal(10)
# Frame buffer coordinates
frame_x = Signal(10)
frame_y = Signal(9)
# VGA signals
vga_r = Signal(8)
vga_g = Signal(8)
vga_b = Signal(8)
vga_hsync = Signal()
vga_vsync = Signal()
vga_blank = Signal()
# Pixel from camera
pix = Rgb565()
# Fifo stream
m.submodules.fifo_stream = fs = FifoStream()
# SPI memory for remote configuration
m.submodules.spimem = spimem = SpiMem(addr_bits=32)
# Color Control
m.submodules.cc = cc = ColorControl()
# Image convolution
m.submodules.imc = imc = ImageConv()
# Statistics
m.submodules.stats = stats = Stats()
# Histogram
m.submodules.hist = hist = Hist()
# Filter
m.submodules.fil = fil = Filt()
# Monochrome
m.submodules.mon = mon = Mono()
# Saturation
m.submodules.sat = sat = Saturation()
# Sync the fifo with the camera
with m.If(~sync_fifo & (camread.col == cam_x_res - 1)
& (camread.row == cam_y_res - 1)):
m.d.sync += sync_fifo.eq(1)
with m.If(btn1):
m.d.sync += sync_fifo.eq(0)
# Set histogram value to the data for the chosen channel
with m.Switch(hist_chan):
with m.Case(0):
m.d.comb += hist_val.eq(cc.o.r)
with m.Case(1):
m.d.comb += hist_val.eq(cc.o.g)
with m.Case(2):
m.d.comb += hist_val.eq(cc.o.b)
with m.Case(3):
m.d.comb += hist_val.eq(mon.o_m)
# Copy camera data to Rgb565 record
m.d.comb += [
pix.r.eq(camread.pixel_data[11:]),
pix.g.eq(camread.pixel_data[5:11]),
pix.b.eq(camread.pixel_data[:5])
]
# Input image processing pipeline
pipeline = [
[
fs,
{
"i": pix, # Fifo stream
"i_valid": camread.pixel_valid & camread.col[0],
"i_ready": cc.o_ready,
"i_en": sync_fifo
},
True
],
[sat, {
"i_en": sat_en,
"i_saturation": saturation
}, True],
[cc, {
"i_cc": ccr
}, True], # Color control
[
fil,
{
"i_en": filt_en, # Color filter
"i_frame_done": fs.o_eof,
"i_l": l,
"i_h": h
},
True
],
[
mon,
{
"i_en": mono_en | invert
| thresh_en, # Monochrome, invert and threshold
"i_invert": invert,
"i_thresh": thresh_en,
"i_threshold": threshold
},
True
],
[
imc,
{
"i_ready": 1, # Image convolution
"i_reset": ~fs.i_en,
"i_sel": sharpness
},
True
],
[
stats,
{
"i":
cc.o, # Statistics
"i_valid":
cc.o_valid,
"i_avg_valid": (fs.o_x >= 32) & (fs.o_x < 288) &
(fs.o_y >= 112) & (fs.o_y < 368),
"i_frame_done":
fs.o_eof,
"i_x":
fs.o_x,
"i_y":
fs.o_y,
"i_roi":
roi
},
False
],
[
hist,
{
"i_p": hist_val, # Histogram
"i_valid": mon.o_valid,
"i_clear": fs.o_eof,
"i_x": fs.o_x,
"i_y": fs.o_y,
"i_roi": roi,
"i_bin": hbin
},
False
]
]
def execute(pl):
us = None # Upstream
for p in pl:
mod = p[0]
d = p[1]
st = p[2] # Stream or Sink
if st and us is not None:
m.d.comb += mod.i.eq(us.o)
m.d.comb += mod.i_valid.eq(us.o_valid)
m.d.comb += us.i_ready.eq(mod.o_ready)
if st:
us = mod
for k in d:
m.d.comb += mod.__dict__[k].eq(d[k])
execute(pipeline)
# Take a snapshot, freeze the camera, and write the framebuffer to the uart
# Note that this suspends video output
with m.If(debsnap.btn_down | (spimem.wr & (spimem.addr == 22))):
with m.If(frozen):
m.d.sync += frozen.eq(0)
with m.Else():
m.d.sync += [
snap.eq(1),
frozen.eq(0),
w_addr.eq(0),
written.eq(0),
byte.eq(0)
]
# Wait to end of frame after requesting snapshot, before start of writing to uart
with m.If(imc.o_eof & snap):
m.d.sync += [frozen.eq(1), snap.eq(0)]
with m.If(~written):
m.d.sync += writing.eq(1)
# Connect the uart
m.d.comb += [
serial.tx.data.eq(Mux(byte, r.data[8:], r.data[:8])),
serial.tx.ack.eq(writing)
]
# Write to the uart from frame buffer (affects video output)
with m.If(writing):
with m.If(w_addr == x_res * y_res):
m.d.sync += [writing.eq(0), written.eq(1)]
with m.Elif(serial.tx.ack & serial.tx.rdy):
m.d.sync += byte.eq(~byte)
with m.If(byte):
m.d.sync += w_addr.eq(w_addr + 1)
# Connect spimem
m.d.comb += [
spimem.csn.eq(~csn),
spimem.sclk.eq(sclk),
spimem.copi.eq(copi),
cipo.eq(spimem.cipo),
]
# Writable configuration registers
spi_wr_vals = Array([
ccr.brightness, ccr.redness, ccr.greenness, ccr.blueness, l.r, h.r,
l.g, h.g, l.b, h.b, sharpness, filt_en, border, mono_en, invert,
grid, hist_view, roi.x[1:], roi.y[1:], roi.w[1:], roi.h[1:],
roi.en, None, None, None, threshold, thresh_en, hist_chan, flip,
None, None, None, None, None, None, None, None, None, frozen, None,
None, sat_en, saturation, ccr.offset
])
with m.If(spimem.wr):
with m.Switch(spimem.addr):
for i in range(len(spi_wr_vals)):
if spi_wr_vals[i] is not None:
with m.Case(i):
m.d.sync += spi_wr_vals[i].eq(spimem.dout)
# Readable configuration registers
spi_rd_vals = Array([
ccr.brightness, ccr.redness, ccr.greenness, ccr.blueness, l.r, h.r,
l.g, h.g, l.b, h.b, sharpness, filt_en, border, mono_en, invert,
grid, hist_view, roi.x[1:], roi.y[1:], roi.w[1:], roi.h[1:],
roi.en, fil.o_nz[16:], fil.o_nz[8:16], fil.o_nz[:8], threshold,
thresh_en, hist_chan, flip, stats.o_min.r, stats.o_min.g,
stats.o_min.b, stats.o_max.r, stats.o_max.g, stats.o_max.b,
stats.o_avg.r, stats.o_avg.g, stats.o_avg.b, frozen, writing,
written, sat_en, saturation, ccr.offset
])
with m.If(spimem.rd):
with m.Switch(spimem.addr):
for i in range(len(spi_rd_vals)):
with m.Case(i):
m.d.sync += spimem.din.eq(spi_rd_vals[i])
# Add VGA generator
m.submodules.vga = vga = VGA(
resolution_x=self.timing.x,
hsync_front_porch=hsync_front_porch,
hsync_pulse=hsync_pulse_width,
hsync_back_porch=hsync_back_porch,
resolution_y=self.timing.y,
vsync_front_porch=vsync_front_porch,
vsync_pulse=vsync_pulse_width,
vsync_back_porch=vsync_back_porch,
bits_x=16, # Play around with the sizes because sometimes
bits_y=16 # a smaller/larger value will make it pass timing.
)
# Fetch histogram for display
m.d.sync += old_x.eq(vga.o_beam_x)
with m.If(vga.o_beam_x == 0):
m.d.sync += [hbin.eq(0), bin_cnt.eq(0)]
with m.Elif(vga.o_beam_x != old_x):
m.d.sync += bin_cnt.eq(bin_cnt + 1)
with m.If(bin_cnt == 19):
m.d.sync += [bin_cnt.eq(0), hbin.eq(hbin + 1)]
# Switch between camera and histogram view
with m.If(debhist.btn_down):
m.d.sync += hist_view.eq(~hist_view)
# Connect frame buffer, with optional x and y flip
m.d.comb += [
frame_x.eq(
Mux(flip[0], x_res - 1 - vga.o_beam_x[1:], vga.o_beam_x[1:])),
frame_y.eq(Mux(flip[1], y_res - 1 - vga.o_beam_y, vga.o_beam_y)),
w.en.eq(imc.o_valid & ~frozen),
w.addr.eq(imc.o_y * x_res + imc.o_x),
w.data.eq(imc.o.as_data()),
r.addr.eq(Mux(writing, w_addr, frame_y * x_res + frame_x))
]
# Apply the On-Screen Display (OSD)
m.submodules.osd = osd = OSD()
m.d.comb += [
osd.x.eq(vga.o_beam_x),
osd.y.eq(vga.o_beam_y),
hist_color.eq(Mux((479 - osd.y) < hist.o_val[8:], 0xff, 0x00)),
osd.i_r.eq(
Mux(hist_view,
Mux((hist_chan == 0) | (hist_chan == 3), hist_color, 0),
Cat(Const(0, unsigned(3)), r.data[11:16]))),
osd.i_g.eq(
Mux(hist_view,
Mux((hist_chan == 1) | (hist_chan == 3), hist_color, 0),
Cat(Const(0, unsigned(2)), r.data[5:11]))),
osd.i_b.eq(
Mux(hist_view,
Mux((hist_chan == 2) | (hist_chan == 3), hist_color, 0),
Cat(Const(0, unsigned(3)), r.data[0:5]))),
osd.on.eq(osd_on),
osd.osd_val.eq(osd_val),
osd.sel.eq(osd_sel),
osd.grid.eq(grid),
osd.border.eq(border),
osd.roi.eq(roi.en & ~hist_view),
osd.roi_x.eq(roi.x),
osd.roi_y.eq(roi.y),
osd.roi_w.eq(roi.w),
osd.roi_h.eq(roi.h)
]
# OSD control
dummy = Signal()
osd_vals = Array([
ccr.offset, ccr.brightness, ccr.redness, ccr.greenness,
ccr.blueness, sharpness, sat_en, saturation, mono_en, invert,
thresh_en, threshold, hist_chan,
Cat(border, grid), flip, filt_en
])
with m.If(debosd.btn_down):
m.d.sync += osd_on.eq(~osd_on)
with m.If(osd_on):
with m.If(debsel.btn_down):
m.d.sync += osd_sel.eq(~osd_sel)
with m.If(debup.btn_down):
with m.If(~osd_sel):
m.d.sync += osd_val.eq(osd_val - 1)
with m.Else():
with m.Switch(osd_val):
for i in range(len(osd_vals)):
with m.Case(i):
if (len(osd_vals[i]) == 1):
m.d.sync += osd_vals[i].eq(1)
else:
m.d.sync += osd_vals[i].eq(osd_vals[i] + 1)
with m.If(debdown.btn_down):
with m.If(~osd_sel):
m.d.sync += osd_val.eq(osd_val + 1)
with m.Else():
with m.Switch(osd_val):
for i in range(len(osd_vals)):
with m.Case(i):
if (len(osd_vals[i]) == 1):
m.d.sync += osd_vals[i].eq(0)
else:
m.d.sync += osd_vals[i].eq(osd_vals[i] - 1)
# Show configuration values on leds
with m.Switch(osd_val):
for i in range(len(osd_vals)):
with m.Case(i):
m.d.comb += leds.eq(osd_vals[i])
# Generate VGA signals
m.d.comb += [
vga.i_clk_en.eq(1),
vga.i_test_picture.eq(0),
vga.i_r.eq(osd.o_r),
vga.i_g.eq(osd.o_g),
vga.i_b.eq(osd.o_b),
vga_r.eq(vga.o_vga_r),
vga_g.eq(vga.o_vga_g),
vga_b.eq(vga.o_vga_b),
vga_hsync.eq(vga.o_vga_hsync),
vga_vsync.eq(vga.o_vga_vsync),
vga_blank.eq(vga.o_vga_blank),
]
# VGA to digital video converter.
tmds = [Signal(2) for i in range(4)]
m.submodules.vga2dvid = vga2dvid = VGA2DVID(
ddr=self.ddr, shift_clock_synchronizer=False)
m.d.comb += [
vga2dvid.i_red.eq(vga_r),
vga2dvid.i_green.eq(vga_g),
vga2dvid.i_blue.eq(vga_b),
vga2dvid.i_hsync.eq(vga_hsync),
vga2dvid.i_vsync.eq(vga_vsync),
vga2dvid.i_blank.eq(vga_blank),
tmds[3].eq(vga2dvid.o_clk),
tmds[2].eq(vga2dvid.o_red),
tmds[1].eq(vga2dvid.o_green),
tmds[0].eq(vga2dvid.o_blue),
]
# GPDI pins
if (self.ddr):
# Vendor specific DDR modules.
# Convert SDR 2-bit input to DDR clocked 1-bit output (single-ended)
# onboard GPDI.
m.submodules.ddr0_clock = Instance("ODDRX1F",
i_SCLK=ClockSignal("shift"),
i_RST=0b0,
i_D0=tmds[3][0],
i_D1=tmds[3][1],
o_Q=self.o_gpdi_dp[3])
m.submodules.ddr0_red = Instance("ODDRX1F",
i_SCLK=ClockSignal("shift"),
i_RST=0b0,
i_D0=tmds[2][0],
i_D1=tmds[2][1],
o_Q=self.o_gpdi_dp[2])
m.submodules.ddr0_green = Instance("ODDRX1F",
i_SCLK=ClockSignal("shift"),
i_RST=0b0,
i_D0=tmds[1][0],
i_D1=tmds[1][1],
o_Q=self.o_gpdi_dp[1])
m.submodules.ddr0_blue = Instance("ODDRX1F",
i_SCLK=ClockSignal("shift"),
i_RST=0b0,
i_D0=tmds[0][0],
i_D1=tmds[0][1],
o_Q=self.o_gpdi_dp[0])
else:
m.d.comb += [
self.o_gpdi_dp[3].eq(tmds[3][0]),
self.o_gpdi_dp[2].eq(tmds[2][0]),
self.o_gpdi_dp[1].eq(tmds[1][0]),
self.o_gpdi_dp[0].eq(tmds[0][0]),
]
return m
def elaborate(self, platform):
m = Module()
# Consume input condition
read_input = self.i_valid & self.o_ready
# x and y co-ordinates of input pixel
x = Signal(bits_for(self.w), reset=0)
y = Signal(bits_for(self.h), reset=0)
# Line buffer
mem = Memory(width=16, depth=self.w)
m.submodules.rp = rp = mem.read_port()
m.submodules.wp = wp = mem.write_port()
# Connect line buffer
m.d.comb += [
rp.addr.eq(self.o_x - self.n + 1),
wp.addr.eq(x),
wp.en.eq(read_input),
wp.addr.eq(x),
wp.data.eq(self.i.as_data())
]
# For simulation
if platform is None:
# Make the line buffer visible in gtkwave
l0 = Signal(self.w * 16)
m.d.comb += l0.eq(Cat([mem[self.w - 1 - i]
for i in range(self.w)]))
# Save start and end pixel
s_p = Rgb565()
e_p = Rgb565()
# Keep a copy of start and end pixels, and calculate input co-ordinates
with m.If(read_input):
m.d.sync += x.eq(x + 1)
with m.If(x == 0):
m.d.sync += s_p.eq(self.i)
with m.If(x == self.w - 1):
m.d.sync += [e_p.eq(self.i), x.eq(0), y.eq(y + 1)]
with m.If(y == self.h - 1):
m.d.sync += y.eq(0)
# Determine o_ready
m.d.comb += self.o_ready.eq((self.o_y < self.h + self.n)
& (self.o_x < self.w + self.n)
& ((self.o_y == 0) | (self.o_y > self.n))
& ((self.o_x == 0) | (self.o_x > self.n)))
# Determine end of frame
m.d.comb += self.o_eof.eq(((self.o_x == self.w + self.n * 2 - 1) &
(self.o_y == self.h + self.n * 2 - 1)))
# Determine the output pixel
with m.If((self.o_x >= self.h + self.n)):
m.d.comb += self.o.eq(e_p) # Saved end pixel
with m.Elif((self.o_y == 0)
| ((self.o_y > self.n) & (self.o_y < self.h + self.n))):
# Input pixel line
with m.If((self.o_x > 0) & (self.o_x <= self.n)):
m.d.comb += self.o.eq(s_p) # Saved start pixel
with m.Else():
m.d.comb += self.o.eq(self.i) # Input pixel
with m.Else():
# Line buffer line
with m.If(self.o_x < self.n):
m.d.comb += self.o.eq(s_p) # Saved start pixel
with m.Else():
m.d.comb += [ # From line buffer
self.o.r.eq(rp.data[11:]),
self.o.g.eq(rp.data[5:11]),
self.o.b.eq(rp.data[:5])
]
# Output pixels
with m.If(self.i_ready):
# Output pixel always valid, when downstream is ready
m.d.comb += self.o_valid.eq(1)
# Set the output co-ordinates
m.d.sync += self.o_x.eq(self.o_x + 1)
with m.If(self.o_x == self.w + self.n * 2 - 1):
m.d.sync += [self.o_y.eq(self.o_y + 1), self.o_x.eq(0)]
with m.If(self.o_y == self.h + self.n * 2 - 1):
m.d.sync += self.o_y.eq(0),
return m
def elaborate(self, platform):
# VGA constants
pixel_f = self.timing.pixel_freq
hsync_front_porch = self.timing.h_front_porch
hsync_pulse_width = self.timing.h_sync_pulse
hsync_back_porch = self.timing.h_back_porch
vsync_front_porch = self.timing.v_front_porch
vsync_pulse_width = self.timing.v_sync_pulse
vsync_back_porch = self.timing.v_back_porch
# Pins
clk25 = platform.request("clk25")
ov7670 = platform.request("ov7670")
led = [platform.request("led", i) for i in range(8)]
leds = Cat([i.o for i in led])
led8_2 = platform.request("led8_2")
leds8_2 = Cat([led8_2.leds[i] for i in range(8)])
led8_3 = platform.request("led8_3")
leds8_3 = Cat([led8_3.leds[i] for i in range(8)])
leds16 = Cat(leds8_3, leds8_2)
btn1 = platform.request("button_fire", 0)
btn2 = platform.request("button_fire", 1)
up = platform.request("button_up", 0)
down = platform.request("button_down", 0)
pwr = platform.request("button_pwr", 0)
left = platform.request("button_left", 0)
right = platform.request("button_right", 0)
sw = Cat([platform.request("switch",i) for i in range(4)])
uart = platform.request("uart")
divisor = int(platform.default_clk_frequency // 460800)
esp32 = platform.request("esp32_spi")
csn = esp32.csn
sclk = esp32.sclk
copi = esp32.copi
cipo = esp32.cipo
m = Module()
# Clock generator.
m.domains.sync = cd_sync = ClockDomain("sync")
m.domains.pixel = cd_pixel = ClockDomain("pixel")
m.domains.shift = cd_shift = ClockDomain("shift")
m.submodules.ecp5pll = pll = ECP5PLL()
pll.register_clkin(clk25, platform.default_clk_frequency)
pll.create_clkout(cd_sync, platform.default_clk_frequency)
pll.create_clkout(cd_pixel, pixel_f)
pll.create_clkout(cd_shift, pixel_f * 5.0 * (1.0 if self.ddr else 2.0))
# Add CamRead submodule
camread = CamRead()
m.submodules.camread = camread
# Camera config
cam_x_res = 640
cam_y_res = 480
camconfig = CamConfig()
m.submodules.camconfig = camconfig
# Connect the camera pins and config and read modules
m.d.comb += [
ov7670.cam_RESET.eq(1),
ov7670.cam_PWON.eq(0),
ov7670.cam_XCLK.eq(clk25.i),
ov7670.cam_SIOC.eq(camconfig.sioc),
ov7670.cam_SIOD.eq(camconfig.siod),
camconfig.start.eq(btn1),
camread.p_data.eq(Cat([ov7670.cam_data[i] for i in range(8)])),
camread.href.eq(ov7670.cam_HREF),
camread.vsync.eq(ov7670.cam_VSYNC),
camread.p_clock.eq(ov7670.cam_PCLK)
]
# Create the uart
m.submodules.serial = serial = AsyncSerial(divisor=divisor, pins=uart)
# Input fifo
fifo_depth=1024
m.submodules.fifo = fifo = SyncFIFOBuffered(width=16,depth=fifo_depth)
# Frame buffer
x_res= cam_x_res // 2
y_res= cam_y_res
buffer = Memory(width=16, depth=x_res * y_res)
m.submodules.r = r = buffer.read_port()
m.submodules.w = w = buffer.write_port()
# Button debouncers
m.submodules.debup = debup = Debouncer()
m.submodules.debdown = debdown = Debouncer()
m.submodules.debosd = debosd = Debouncer()
m.submodules.debsel = debsel = Debouncer()
m.submodules.debsnap = debsnap = Debouncer()
m.submodules.debhist = debhist = Debouncer()
# Connect the buttons to debouncers
m.d.comb += [
debup.btn.eq(up),
debdown.btn.eq(down),
debosd.btn.eq(pwr),
debsel.btn.eq(right),
debsnap.btn.eq(left),
debhist.btn.eq(btn2)
]
# Image processing options
flip = Signal(2, reset=1)
mono = Signal(reset=0)
invert = Signal(reset=0)
gamma = Signal(reset=0)
border = Signal(reset=0)
filt = Signal(reset=0)
grid = Signal(reset=0)
histo = Signal(reset=1)
hbin = Signal(6, reset=0)
bin_cnt = Signal(5, reset=0)
thresh = Signal(reset=0)
threshold = Signal(8, reset=0)
hist_chan = Signal(2, reset=0)
ccc = CC(reset=(0,18,12,16))
sharpness = Signal(unsigned(4), reset=0)
osd_val = Signal(4, reset=0) # Account for spurious start-up button pushes
osd_on = Signal(reset=1)
osd_sel = Signal(reset=1)
snap = Signal(reset=0)
frozen = Signal(reset=1)
writing = Signal(reset=0)
written = Signal(reset=0)
byte = Signal(reset=0)
w_addr = Signal(18)
# Color filter
l = Rgb565(reset=(18,12,6)) # Initialised to red LEGO filter
h = Rgb565(reset=(21,22,14))
# Region of interest
roi = Roi()
# VGA signals
vga_r = Signal(8)
vga_g = Signal(8)
vga_b = Signal(8)
vga_hsync = Signal()
vga_vsync = Signal()
vga_blank = Signal()
# Fifo co-ordinates
f_x = Signal(9)
f_y = Signal(9)
f_frame_done = Signal()
# Pixel from fifo
pix = Rgb565()
# SPI memory for remote configuration
m.submodules.spimem = spimem = SpiMem(addr_bits=32)
# Color Control
m.submodules.cc = cc = ColorControl()
# Image convolution
m.submodules.imc = imc = ImageConv()
# Statistics
m.submodules.stats = stats = Stats()
# Histogram
m.submodules.hist = hist = Hist()
# Filter
m.submodules.fil = fil = Filt()
# Monochrome
m.submodules.mon = mon = Mono()
# Sync the fifo with the camera
sync_fifo = Signal(reset=0)
with m.If(~sync_fifo & ~fifo.r_rdy & (camread.col == cam_x_res - 1) & (camread.row == cam_y_res -1)):
m.d.sync += [
sync_fifo.eq(1),
f_x.eq(0),
f_y.eq(0)
]
with m.If(btn1):
m.d.sync += sync_fifo.eq(0)
# Connect the fifo
m.d.comb += [
fifo.w_en.eq(camread.pixel_valid & camread.col[0] & sync_fifo), # Only write every other pixel
fifo.w_data.eq(camread.pixel_data),
fifo.r_en.eq(fifo.r_rdy & ~imc.o_stall)
]
# Calculate fifo co-ordinates
m.d.sync += f_frame_done.eq(0)
with m.If(fifo.r_en & sync_fifo):
m.d.sync += f_x.eq(f_x + 1)
with m.If(f_x == x_res - 1):
m.d.sync += [
f_x.eq(0),
f_y.eq(f_y + 1)
]
with m.If(f_y == y_res - 1):
m.d.sync += [
f_y.eq(0),
f_frame_done.eq(1)
]
# Extract pixel from fifo data
m.d.comb += [
pix.r.eq(fifo.r_data[11:]),
pix.g.eq(fifo.r_data[5:11]),
pix.b.eq(fifo.r_data[:5])
]
# Connect color control
m.d.comb += [
cc.i.eq(pix),
cc.i_cc.eq(ccc)
]
# Calculate per-frame statistics, after applying color correction
m.d.comb += [
stats.i.eq(cc.o),
stats.i_valid.eq(fifo.r_rdy),
# This is not valid when a region of interest is active
stats.i_avg_valid.eq((f_x >= 32) & (f_x < 288) &
(f_y >= 112) & (f_y < 368)),
stats.i_frame_done.eq(f_frame_done),
stats.i_x.eq(f_x),
stats.i_y.eq(f_y),
stats.i_roi.eq(roi)
]
# Produce histogram, after applying color correction, and after monochrome, for monochrome histogram
with m.Switch(hist_chan):
with m.Case(0):
m.d.comb += hist.i_p.eq(cc.o.r)
with m.Case(1):
m.d.comb += hist.i_p.eq(cc.o.g)
with m.Case(2):
m.d.comb += hist.i_p.eq(cc.o.b)
with m.Case(3):
m.d.comb += hist.i_p.eq(mon.o_m)
m.d.comb += [
hist.i_valid.eq(fifo.r_rdy),
hist.i_clear.eq(f_frame_done),
hist.i_x.eq(f_x),
hist.i_y.eq(f_y),
hist.i_roi.eq(roi),
hist.i_bin.eq(hbin) # Used when displaying histogram
]
# Apply filter, after color correction
m.d.comb += [
fil.i.eq(cc.o),
fil.i_valid.eq(fifo.r_en),
fil.i_en.eq(filt),
fil.i_frame_done.eq(f_frame_done),
fil.i_l.eq(l),
fil.i_h.eq(h)
]
# Apply mono, after color correction and filter
m.d.comb += [
mon.i.eq(fil.o),
mon.i_en.eq(mono),
mon.i_invert.eq(invert),
mon.i_thresh.eq(thresh),
mon.i_threshold.eq(threshold)
]
# Apply image convolution, after other transformations
m.d.comb += [
imc.i.eq(mon.o),
imc.i_valid.eq(fifo.r_rdy),
imc.i_reset.eq(~sync_fifo),
# Select image convolution
imc.i_sel.eq(sharpness)
]
# Take a snapshot, freeze the camera, and write the framebuffer to the uart
# Note that this suspends video output
with m.If(debsnap.btn_down | (spimem.wr & (spimem.addr == 22))):
with m.If(frozen):
m.d.sync += frozen.eq(0)
with m.Else():
m.d.sync += [
snap.eq(1),
frozen.eq(0),
w_addr.eq(0),
written.eq(0),
byte.eq(0)
]
# Wait to end of frame after requesting snapshot, before start of writing to uart
with m.If(imc.o_frame_done & snap):
m.d.sync += [
frozen.eq(1),
snap.eq(0)
]
with m.If(~written):
m.d.sync += writing.eq(1)
# Connect the uart
m.d.comb += [
serial.tx.data.eq(Mux(byte, r.data[8:], r.data[:8])),
serial.tx.ack.eq(writing)
]
# Write to the uart from frame buffer (affects video output)
with m.If(writing):
with m.If(w_addr == x_res * y_res):
m.d.sync += [
writing.eq(0),
written.eq(1)
]
with m.Elif(serial.tx.ack & serial.tx.rdy):
m.d.sync += byte.eq(~byte)
with m.If(byte):
m.d.sync += w_addr.eq(w_addr+1)
# Connect spimem
m.d.comb += [
spimem.csn.eq(~csn),
spimem.sclk.eq(sclk),
spimem.copi.eq(copi),
cipo.eq(spimem.cipo),
]
# Writable configuration registers
spi_wr_vals = Array([ccc.brightness, ccc.redness, ccc.greenness, ccc.blueness, l.r, h.r, l.g, h.g, l.b, h.b,
sharpness, filt, border, mono, invert, grid, histo,
roi.x[1:], roi.y[1:], roi.w[1:], roi.h[1:], roi.en, None, None, None,
threshold, thresh, hist_chan, flip,
None, None, None, None, None, None, None, None, None,
frozen])
with m.If(spimem.wr):
with m.Switch(spimem.addr):
for i in range(len(spi_wr_vals)):
if spi_wr_vals[i] is not None:
with m.Case(i):
m.d.sync += spi_wr_vals[i].eq(spimem.dout)
# Readable configuration registers
spi_rd_vals = Array([ccc.brightness, ccc.redness, ccc.greenness, ccc.blueness, l.r, h.r, l.g, h.g, l.b, h.b,
sharpness, filt, border, mono, invert, grid, histo,
roi.x[1:], roi.y[1:], roi.w[1:], roi.h[1:], roi.en, fil.o_nz[16:], fil.o_nz[8:16], fil.o_nz[:8],
threshold, thresh, hist_chan, flip,
stats.o_min.r, stats.o_min.g, stats.o_min.b,
stats.o_max.r, stats.o_max.g, stats.o_max.b,
stats.o_avg.r, stats.o_avg.g, stats.o_avg.b,
frozen, writing, written])
with m.If(spimem.rd):
with m.Switch(spimem.addr):
for i in range(len(spi_rd_vals)):
with m.Case(i):
m.d.sync += spimem.din.eq(spi_rd_vals[i])
# Add VGA generator
m.submodules.vga = vga = VGA(
resolution_x = self.timing.x,
hsync_front_porch = hsync_front_porch,
hsync_pulse = hsync_pulse_width,
hsync_back_porch = hsync_back_porch,
resolution_y = self.timing.y,
vsync_front_porch = vsync_front_porch,
vsync_pulse = vsync_pulse_width,
vsync_back_porch = vsync_back_porch,
bits_x = 16, # Play around with the sizes because sometimes
bits_y = 16 # a smaller/larger value will make it pass timing.
)
# Fetch histogram for display
old_x = Signal(10)
m.d.sync += old_x.eq(vga.o_beam_x)
with m.If(vga.o_beam_x == 0):
m.d.sync += [
hbin.eq(0),
bin_cnt.eq(0)
]
with m.Elif(vga.o_beam_x != old_x):
m.d.sync += bin_cnt.eq(bin_cnt+1)
with m.If(bin_cnt == 19):
m.d.sync += [
bin_cnt.eq(0),
hbin.eq(hbin+1)
]
# Switch between camera and histogram view
with m.If(debhist.btn_down):
m.d.sync += histo.eq(~histo)
# Connect frame buffer, with optional x and y flip
x = Signal(10)
y = Signal(9)
m.d.comb += [
w.en.eq(imc.o_valid & ~frozen),
w.addr.eq(imc.o_y * x_res + imc.o_x),
w.data.eq(Cat(imc.o.b, imc.o.g, imc.o.r)),
y.eq(Mux(flip[1], y_res - 1 - vga.o_beam_y, vga.o_beam_y)),
x.eq(Mux(flip[0], x_res - 1 - vga.o_beam_x[1:], vga.o_beam_x[1:])),
r.addr.eq(Mux(writing, w_addr, y * x_res + x))
]
# Apply the On-Screen Display (OSD)
m.submodules.osd = osd = OSD()
hist_col = Signal(8)
m.d.comb += [
osd.x.eq(vga.o_beam_x),
osd.y.eq(vga.o_beam_y),
hist_col.eq(Mux((479 - osd.y) < hist.o_val[8:], 0xff, 0x00)),
osd.i_r.eq(Mux(histo, Mux((hist_chan == 0) | (hist_chan == 3), hist_col, 0), Cat(Const(0, unsigned(3)), r.data[11:16]))),
osd.i_g.eq(Mux(histo, Mux((hist_chan == 1) | (hist_chan == 3), hist_col, 0), Cat(Const(0, unsigned(2)), r.data[5:11]))),
osd.i_b.eq(Mux(histo, Mux((hist_chan == 2) | (hist_chan == 3), hist_col, 0), Cat(Const(0, unsigned(3)), r.data[0:5]))),
osd.on.eq(osd_on),
osd.osd_val.eq(osd_val),
osd.sel.eq(osd_sel),
osd.grid.eq(grid),
osd.border.eq(border),
osd.roi.eq(roi.en & ~histo),
osd.roi_x.eq(roi.x),
osd.roi_y.eq(roi.y),
osd.roi_w.eq(roi.w),
osd.roi_h.eq(roi.h)
]
# OSD control
osd_vals = Array([ccc.brightness, ccc.redness, ccc.greenness, ccc.blueness, mono, flip[0], flip[1],
border, sharpness, invert, grid, filt])
with m.If(debosd.btn_down):
m.d.sync += osd_on.eq(~osd_on)
with m.If(osd_on):
with m.If(debsel.btn_down):
m.d.sync += osd_sel.eq(~osd_sel)
with m.If(debup.btn_down):
with m.If(~osd_sel):
m.d.sync += osd_val.eq(Mux(osd_val == 0, 11, osd_val-1))
with m.Else():
with m.Switch(osd_val):
for i in range(len(osd_vals)):
with m.Case(i):
if (len(osd_vals[i]) == 1):
m.d.sync += osd_vals[i].eq(1)
else:
m.d.sync += osd_vals[i].eq(osd_vals[i]+1)
with m.If(debdown.btn_down):
with m.If(~osd_sel):
m.d.sync += osd_val.eq(Mux(osd_val == 11, 0, osd_val+1))
with m.Else():
with m.Switch(osd_val):
for i in range(len(osd_vals)):
with m.Case(i):
if (len(osd_vals[i]) == 1):
m.d.sync += osd_vals[i].eq(0)
else:
m.d.sync += osd_vals[i].eq(osd_vals[i]-1)
# Show configuration values on leds
with m.Switch(osd_val):
for i in range(len(osd_vals)):
with m.Case(i):
m.d.comb += leds.eq(osd_vals[i])
# Generate VGA signals
m.d.comb += [
vga.i_clk_en.eq(1),
vga.i_test_picture.eq(0),
vga.i_r.eq(osd.o_r),
vga.i_g.eq(osd.o_g),
vga.i_b.eq(osd.o_b),
vga_r.eq(vga.o_vga_r),
vga_g.eq(vga.o_vga_g),
vga_b.eq(vga.o_vga_b),
vga_hsync.eq(vga.o_vga_hsync),
vga_vsync.eq(vga.o_vga_vsync),
vga_blank.eq(vga.o_vga_blank),
]
# VGA to digital video converter.
tmds = [Signal(2) for i in range(4)]
m.submodules.vga2dvid = vga2dvid = VGA2DVID(ddr=self.ddr, shift_clock_synchronizer=False)
m.d.comb += [
vga2dvid.i_red.eq(vga_r),
vga2dvid.i_green.eq(vga_g),
vga2dvid.i_blue.eq(vga_b),
vga2dvid.i_hsync.eq(vga_hsync),
vga2dvid.i_vsync.eq(vga_vsync),
vga2dvid.i_blank.eq(vga_blank),
tmds[3].eq(vga2dvid.o_clk),
tmds[2].eq(vga2dvid.o_red),
tmds[1].eq(vga2dvid.o_green),
tmds[0].eq(vga2dvid.o_blue),
]
# GPDI pins
if (self.ddr):
# Vendor specific DDR modules.
# Convert SDR 2-bit input to DDR clocked 1-bit output (single-ended)
# onboard GPDI.
m.submodules.ddr0_clock = Instance("ODDRX1F",
i_SCLK = ClockSignal("shift"),
i_RST = 0b0,
i_D0 = tmds[3][0],
i_D1 = tmds[3][1],
o_Q = self.o_gpdi_dp[3])
m.submodules.ddr0_red = Instance("ODDRX1F",
i_SCLK = ClockSignal("shift"),
i_RST = 0b0,
i_D0 = tmds[2][0],
i_D1 = tmds[2][1],
o_Q = self.o_gpdi_dp[2])
m.submodules.ddr0_green = Instance("ODDRX1F",
i_SCLK = ClockSignal("shift"),
i_RST = 0b0,
i_D0 = tmds[1][0],
i_D1 = tmds[1][1],
o_Q = self.o_gpdi_dp[1])
m.submodules.ddr0_blue = Instance("ODDRX1F",
i_SCLK = ClockSignal("shift"),
i_RST = 0b0,
i_D0 = tmds[0][0],
i_D1 = tmds[0][1],
o_Q = self.o_gpdi_dp[0])
else:
m.d.comb += [
self.o_gpdi_dp[3].eq(tmds[3][0]),
self.o_gpdi_dp[2].eq(tmds[2][0]),
self.o_gpdi_dp[1].eq(tmds[1][0]),
self.o_gpdi_dp[0].eq(tmds[0][0]),
]
return m