def _no_implement_connect(self, program=True, program_port=-1):
"""
Initialise this host node to its normal running state.
:param program: Should the FPGA be reprogrammed?
:param program_port: Which port should be used for programming. -1 means random.
:return: True if the FPGA client is running and connected.
"""
raise NotImplementedError
if not self.is_connected():
KatcpFpga.connect(self)
if program:
self.upload_to_ram_and_program(self.boffile, port=program_port)
self.test_connection()
self.get_system_information()
return self.is_running()
def __init__(self, host, katcp_port=7147, boffile=None, connect=False):
Host.__init__(self, host, katcp_port)
KatcpFpga.__init__(self, host, katcp_port, connect=connect)
self.boffile = boffile
#dbof = '/srv/bofs/deng/r2_deng_tvg_2014_Jul_21_0838.fpg'
#dbof = '/srv/bofs/deng/r2_deng_tvg_2014_Aug_27_1619.fpg'
DIG_BOF = '/home/paulp/r2_deng_tvg_2014_Sep_11_1230.fpg'
DIG_HOST = 'roach020922'
DIG_IP_START = '10.100.0.70'
DIG_MAC_START = '02:02:00:00:00:01'
DIG_TX_PORT = 8888
DIG_TX_IP_START = '239.0.0.68'
if args.start and args.stop:
raise RuntimeError('Start and stop?')
# make the fpga host
fdig = KatcpFpga(DIG_HOST)
print 'Connected to %s.' % fdig.host
if args.program:
stime = time.time()
fdig.upload_to_ram_and_program(DIG_BOF)
print 'Programmed %s in %.2f seconds.' % (fdig.host, time.time() - stime)
# stop sending data
fdig.registers.control.write(gbe_txen=False)
# start the local timer on the test d-engine - mrst, then a fake sync
fdig.registers.control.write(mrst='pulse')
fdig.registers.control.write(msync='pulse')
# the all_fpgas have tengbe cores, so set them up
ip_bits = DIG_IP_START.split('.')
ipbase = int(ip_bits[3])
mac_bits = DIG_MAC_START.split(':')
import time
# for bitstream = /tmp/test_syncgen4_2016_Feb_12_1758.fpg
from casperfpga.katcp_fpga import KatcpFpga
from casperfpga.memory import bin2fp, fp2fixed_int
hostname = 'roach020818'
f = KatcpFpga(hostname)
f.get_system_information()
f.registers.bf_config.write(tvg_sel=1)
def convert_to_freq(num, beamweight=1.0):
"""
Convert the 100-bit number from the snapshot to the frequency channel
of that data point.
This is assuming that the data is in the pol1 position and the beamweight
being applied is beamweight.
:param num: the 100-bit number to be converted
:param beamweight: the f16.9 beamweight being applied to the data
:return:
"""
# a = num & ((2**50)-1)
# a = num >> 50
p1r = None
p1i = None
p1r8 = None
from casperfpga.katcp_fpga import KatcpFpga
parser = argparse.ArgumentParser(description='Display reorder preprocess snapblock info.',
formatter_class=argparse.ArgumentDefaultsHelpFormatter)
parser.add_argument(dest='host', type=str, action='store',
help='x-engine host')
parser.add_argument('--eof', dest='eof', action='store_true',
default=False,
help='show only eofs')
args = parser.parse_args()
xeng_host = args.host
# create the device and connect to it
xeng_fpga = KatcpFpga(xeng_host)
xeng_fpga.get_system_information()
board_id = xeng_fpga.registers.board_id.read()['data']['reg']
numchans = 4096
numx = 32
fperx = numchans / numx
frange = []
for bid in range(board_id, board_id + 4):
fmin = bid * fperx
fmax = fmin + fperx - 1
frange.append((fmin, fmax))
print(frange
snapdata = []
snapdata.append(xeng_fpga.snapshots.snap_unpack0_ss.read()['data'])
snapdata.append(xeng_fpga.snapshots.snap_unpack1_ss.read()['data'])
snapdata.append(xeng_fpga.snapshots.snap_unpack2_ss.read()['data'])
