This project has been merged into rhea.
This project will not be updated or developed further.
The repository will be deleted in the near future.
forked from cfelton/minnesota
A collection of HDL cores written in MyHDL.
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rowhit/minnesota
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A collection of HDL cores written in MyHDL.
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License
LGPL-3.0, GPL-3.0 licenses found
Licenses found
LGPL-3.0
COPYING.LESSER
GPL-3.0
COPYING
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- Python 89.3%
- Verilog 7.2%
- VHDL 3.4%
- Shell 0.1%