Bus redundancy controller PoC implemented using a FPGA
This project is in a very early stage of design.
The idea comes from an academic paper:
Design of Redundant CAN Bus for Telemetry and Telecommand Subsystem of a Micro-Satellite
Connect several buses common buses (Spacewire, CAN, I2C, SPI...) to a inexpensive, small, low power FPGA (Lattice semi ICE40) that will provide smart switching between different redundant routes (physical traces in the board).
FPGA needs to be small and integrated in order to be easily added to on board computers and other systems. Good candidates are ICE40LP640 or ICE40LP1K in the package configuration 16-ball WLCSP (1.40 x 1.48 mm).
Future developments might consider devices with more IO banks.
Either KiCad or Upverter. Probably upverter as it is an online solution.