def store_load_right_to_left(reg): AVR.POPZ() # idx + 48 AVR.STZ32(reg[5]) # store z AVR.STZ32(reg[2]) # store y AVR.SBIW(30, 8) AVR.STZ32(reg[4]) # store x AVR.STZ32(reg[1]) # store z AVR.SBIW(30, 8) AVR.STZ32(reg[3]) # store y AVR.STZ32(reg[0]) # store x reg = init_state() # reinit the state. # current idx is +8 AVR.ADIW(30, 8) # go to idx + 16 AVR.LDZ32(reg[1]) # load r[1] AVR.LDZ32(reg[4]) # load r[2] AVR.ADIW(30, 8) # skip the next 4 words as they contain garbage (former r[3]) AVR.LDZ32(reg[2]) # load r[4] AVR.LDZ32(reg[5]) # load r[5] # pop the initial values of the other half from the stack ! :p AVR.POP32(reg[0]) # load r[0] AVR.POP32(reg[3]) # load r[1] # current value of idx is +40 AVR.PUSHZ() return reg
def store(): reg = init_state() AVR.STZ32(reg[5]) # store z AVR.STZ32(reg[2]) # store y AVR.SBIW(30,8) AVR.STZ32(reg[4]) # store x AVR.STZ32(reg[1]) # store z AVR.SBIW(30,8) AVR.STZ32(reg[3]) # store y AVR.STZ32(reg[0]) # store x
def store(reg): AVR.POPZ() AVR.STZ32(reg[5]) # store z AVR.STZ32(reg[2]) # store y AVR.SBIW(30, 8) AVR.STZ32(reg[4]) # store x AVR.STZ32(reg[1]) # store z AVR.SBIW(30, 8) AVR.STZ32(reg[3]) # store y AVR.STZ32(reg[0]) # store x return reg
def stack_load_left_to_right(reg): AVR.POPZ() # idx + 48 AVR.PUSH32(reg[3]) AVR.PUSH32(reg[0]) # DO WE DO ONLY A SIMPLE REINIT OR A FULL ??? reg[0].sort() # we only re init the values in r[0] and r[3] reg[3].sort() # we only re init the values in r[0] and r[3] AVR.SBIW(30, 48) # go the begining of the state AVR.LDZ32(reg[0]) # load r[0] AVR.LDZ32(reg[3]) # load r[3] AVR.ADIW(30, 40) # go back to idx+48 : 4 + 4 + 16 + 16 AVR.PUSHZ() # push to the stack : idx + 48 return reg
def stack_load_right_to_left(reg): AVR.POPZ() # idx + 40 AVR.PUSH32(reg[3]) AVR.PUSH32(reg[0]) reg[3].sort() reg[0].sort() # reg = reinit_state(reg) # we only re init the values in r[0] and r[3] AVR.SBIW(30, 32) # skip the next two words AVR.LDZ32(reg[0]) # load r[0] AVR.LDZ32(reg[3]) # load r[3] AVR.ADIW(30, 24) # skip back 8 + 16 # current value of idx is +40 AVR.PUSHZ() return reg
# idx = 24 registers = store_load_right_to_left(registers) # AVR.SBIW(30,24) # idx = 0 # idx = 24 registers = half_state_4SPbox(registers, constants[5]) # rounds 20 21 22 23 - left # first half is active, we did 7 rounds. AVR.comment('first half is active, we did 23 rounds') # idx = 0 registers = stack_load_right_to_left(registers) # idx = 24 registers = last_SPboxes(registers) # idx = 0 registers = store_load_left_to_right(registers) # AVR.ADIW(30,24) # idx = 0 # idx = 48 registers = last_SPboxes(registers) registers = store(registers) AVR.SBIW(30, 8) AVR.MOVW(24, 30) # back to its position AVR.comment('STOP CYCLE COUNT') AVR.pull_from_stack()
load() AVR.PUSHZ() AVR.JMP('spbox') AVR.LBL('spboxend') AVR.POPZ() store() AVR.ADIW(30,8) AVR.POP(28) AVR.DEC(28) AVR.JMP('spbx') AVR.LBL('spbxend') AVR.SBIW(30,16) # pop the constant of the round AVR.POP(28) AVR.LDI(27,3) AVR.AND(27,28) AVR.CPI(27,0) AVR.BRNE('bigswap') reg = init_state() AVR.LDZ32(reg[0]) AVR.LDZ32(reg[1]) AVR.LDZ32(reg[2]) AVR.LDZ32(reg[3])