def test_new_offset(self):
assert self.MIPS.c2.base != HexInt(
0), "unexpected zero offset after inexact setbounds"
assert self.MIPS.c4.offset == HexInt(
0), "offset (second inexact setbounds) should be zero"
assert self.MIPS.c5.offset == HexInt(
0), "offset (exact setbounds) should be zero"
def test_cp2_cfromptr_imprecise_base_cap(self):
assert self.MIPS.c2.base == HexInt(2), "input capability base is wrong"
assert self.MIPS.c2.address == HexInt(
2), "input capability address is wrong"
assert self.MIPS.c2.length == HexInt(
1), "input capability length is wrong"
assert self.MIPS.c2.t, "input capability tag is wrong"
def test_offset(self):
'''Test that cgetpcc returns correct offset'''
assert self.MIPS.a4 == self.MIPS.v0, "cgetpccsetoffset returns incorrect offset"
assert self.MIPS.a5 == self.MIPS.v0, "cgetpccsetoffset returns incorrect offset"
assert self.MIPS.a4 == HexInt(
0x1234), "cgetpccsetoffset returns incorrect offset"
assert self.MIPS.a5 == HexInt(
0x1234), "cgetpccsetoffset returns incorrect offset"
def test_new_base(self):
assert self.MIPS.c2.base == HexInt(
0x5540000000000000), "unexpected base from inexact setbounds"
assert self.MIPS.c2.base == self.MIPS.s3, "base computed with cram is wrong"
assert self.MIPS.s3 == HexInt(
0x5540000000000000), "base computed with cram is wrong"
assert self.MIPS.c4.base == HexInt(
0x5540000000000000), "base (second inexact setbounds) wrong"
assert self.MIPS.c5.base == HexInt(
0x5540000000000000), "base (exact setbounds) is wrong"
def test_new_length(self):
assert self.MIPS.c2.length == HexInt(
0x7ac0000000000000), "unexpected length from inexact setbounds"
assert self.MIPS.c2.length == self.MIPS.s2, "base computed with cram is wrong"
assert self.MIPS.s2 == HexInt(
0x7ac0000000000000), "length computed with cram is wrong"
assert self.MIPS.c4.length == HexInt(
0x7ac0000000000000), "length (second inexact setbounds) wrong"
assert self.MIPS.c5.length == HexInt(
0x7ac0000000000000), "length (exact setbounds) is wrong"
def test_third_load_failed(self):
self.assertCp2Fault(self.MIPS.s3,
cap_cause=self.MIPS.CapCause.Length_Violation,
cap_reg=0,
trap_count=1,
msg="lhu with length 1 $ddc should fail")
assert self.MIPS.a4 == HexInt(0), "Should not have loaded"
def test_load_failed(self):
self.assertCp2Fault(self.MIPS.s4,
cap_cause=self.MIPS.CapCause.Tag_Violation,
cap_reg=0,
trap_count=2,
msg="lhu with NULL $ddc should fail")
assert self.MIPS.a4 == HexInt(0), "Should not have loaded"
def test_cap2_tag_after_memset(self):
# The initial implementation of magic memset only cleared the first tag
# -> check that we clear the tag for cap2 as well
# self.assertNullCap(self.MIPS.c5, msg="Should be a untagged null cap after memset")
assert self.MIPS.c7.t == 0, "second cap tag should NOT be set after memset"
assert self.MIPS.c7.address == HexInt(
0x1111111111111111), "cursor should be all 0x11 after memset"
def test_cp2_cfromptr_imprecise_addr_precise(self):
# The address should be correct even if the capability became unrepresentable
assert self.MIPS.c1.address == HexInt(
0x0000000001000002
), "CFromPtr did not set address to the expected value"
self.assertRegisterEqual(
self.MIPS.a4, 0x0000000001000002,
"CFromPtr did not set address to the expected value")
def test_epc(self):
# Test that base+offset is preserved for unrepresentable EPCC
# In precise (256) case base remains the same and s3 is as requested (0x1000000),
# In unrepresentable case EPCC.base will be zero but base+offset will be as requested.
# a7 = sandbox address == initial base of EPCC
# s3 = EPC after setting (maybe) unrepresentable
# c3 = EPCC after
assert self.MIPS.c3.base + self.MIPS.s3 == self.MIPS.a7 + HexInt(0x10000000), "sandbox EPC unexpected"
def test_basic_addr_zero(self):
assert self.MIPS.c1.address == HexInt(0), "expected address zero"
self.assertValidCap(
self.MIPS.c1,
base=0,
offset=0,
perms=self.max_permissions,
length=self.max_length,
msg="Expected full addrspace value with offset == 0")
def test_bdelay_offset_zero(self):
"""Check that we set the current $pcc value even in a branch delay slot"""
assert self.MIPS.c2.address == HexInt(0), "expected address zero"
self.assertValidCap(
self.MIPS.c2,
base=0,
offset=0,
perms=self.max_permissions,
length=self.max_length,
msg="Expected full addrspace value with offset == 0")
def test_address_was_stored(self):
assert self.MIPS.c21.address == HexInt(
2), "Address 1 should have changed"
assert self.MIPS.c22.address == HexInt(
3), "Address 2 should have changed"
assert self.MIPS.c23.address == HexInt(
4), "Address 3 should have changed"
assert self.MIPS.c24.address == HexInt(
5), "Address 4 should have changed"
assert self.MIPS.c25.address == HexInt(
6), "Address 5 should have changed"
assert self.MIPS.c26.address == HexInt(
7), "Address 6 should have changed"
assert self.MIPS.c27.address == HexInt(
8), "Address 7 should have changed"
assert self.MIPS.c28.address == HexInt(
9), "Address 8 should have changed"
def test_other_capregs(self):
for regnum in range(1, 31):
name = "$c" + str(regnum)
cap = self.MIPS.cp2[regnum]
if regnum == 11:
# Stack should be 4k
stack_size = 4096
self.assertValidCap(cap, name + " (stack cap)", perms=self.max_nonexec_perms,
offset=stack_size, length=stack_size, base=self.MIPS.sp - stack_size)
assert HexInt(cap.base + cap.offset) == self.MIPS.sp, "Address of $c11 should be same as $sp"
elif regnum == 12:
self.assertValidCap(cap, name + " (jump cap)", perms=self.max_nostore_perms,
offset=self.MIPS.t9, length=self.max_length)
elif regnum == 17:
self.assertValidCap(cap, name + " (link cap)", perms=self.max_nostore_perms,
offset=self.MIPS.ra, length=self.max_length)
else:
# All other capability registers should be null
# Note: $c26 should also be null since _CHERI_CAPABILITY_TABLE_ will have
# value zero because there are no global capabilities. This ensures
# that we can reuse the same checks for both cap-table and legacy ABI
self.assertNullCap(cap, name)
def test_start_byte_before_memset(self):
assert self.MIPS.s0 == HexInt(0xaa)
def test_after_store_unaliged_traps(self):
assert self.MIPS.s0 == HexInt(0xdead)
def test_after_store_unaliged_ok(self):
assert self.MIPS.s0 == HexInt(0x1122334455667788)
def test_precise_result(self):
# no rounding with precise caps:
assert self.MIPS.c2.base == HexInt(0x5555aaaa5555aaaa)
assert self.MIPS.c2.length == HexInt(0xaaaa5555aaaa5555)
assert self.MIPS.a0 == HexInt(0xaaaa5555aaaa5555)
def test_rounded_cap_base(self):
assert self.MIPS.c2.base == HexInt(0x5540000000000000)
def test_rounded_cap_length(self):
assert self.MIPS.c2.length == HexInt(0xaac0000000000000)
def test_small_buffer_cap2_after(self):
assert self.MIPS.c13.t == 1, "small buffer second tag should still be set after memcpy"
assert self.MIPS.c13.offset == HexInt(0x1234), "second cap cursor should be unchanged after memset"
def test_one_past_end_after_memset(self):
assert self.MIPS.s6 == HexInt(0xaaaaaaaa)
def test_start_byte_after_memset(self):
assert self.MIPS.s4 == HexInt(0xdeadc0de)
def test_end_byte_before_memset(self):
assert self.MIPS.s1 == HexInt(0xaa)
def test_magic_nop_called(self):
assert self.MIPS.s3 == HexInt(
0xDEC0DED
), "magic function selector $v1 should be changed to 0xDEC0DED after call"
def test_cround_representable_length_expected_result(self):
assert self.MIPS.a0 == HexInt(
0xaac0000000000000), "wrong result from crrl?"
def test_last_byte_after_memset(self):
assert self.MIPS.s5 == HexInt(0xdeadc0de)
def test_tag_after_memset(self):
# self.assertNullCap(self.MIPS.c5, msg="Should be a untagged null cap after memset")
assert self.MIPS.c5.t == 0, "tag should NOT be set after memset"
assert self.MIPS.c5.address == HexInt(0x1111111111111111), "cursor should be all 0x11 after memset"
def test_two_past_end_after_memset(self):
assert self.MIPS.s7 == HexInt(0xffeeddcc)
def test_small_buffer_cap1_after(self):
assert self.MIPS.c12.t == 0, "small buffer first tag should NOT be set after memcpy"
assert self.MIPS.c12.address == HexInt(0x1111111111111111), "cursor should be all 0x11 after memcpy"
