def get_serial_type():
""" Get serial console type specified by user """
ttys_type = ''
ttys_value = ''
pci_mmio = False
# Get ttySx information from board config file
ttys_lines = board_cfg_lib.get_info(common.BOARD_INFO_FILE, "<TTYS_INFO>",
"</TTYS_INFO>")
# Get ttySx from scenario config file which selected by user
(err_dic, ttyn) = board_cfg_lib.parser_hv_console()
if err_dic:
hv_cfg_lib.ERR_LIST.update(err_dic)
# query the serial type from board config file
for line in ttys_lines:
if ttyn in line:
# line format:
# seri:/dev/ttyS0 type:portio base:0x3F8 irq:4
# seri:/dev/ttyS0 type:mmio base:0xB3640000 irq:4 [bdf:"0:x.y"]
ttys_type = line.split()[1].split(':')[1]
if ttys_type == "portio":
ttys_value = line.split()[2].split(':')[1]
elif ttys_type == "mmio":
if 'bdf' in line:
ttys_value = line.split()[-1].split('"')[1:-1][0]
pci_mmio = True
else:
ttys_value = line.split()[2].split(':')[1]
break
return (ttys_type, ttys_value, pci_mmio)
def get_sos_vuart_settings(launch_flag=True):
"""
Get vuart setting from scenario setting
:return: vuart0/vuart1 setting dictionary
"""
global SOS_UART1_VALID_NUM
err_dic = {}
vuart0_setting = {}
vuart1_setting = {}
(err_dic, ttys_n) = board_cfg_lib.parser_hv_console()
if err_dic:
if launch_flag:
SOS_UART1_VALID_NUM += "ttyS1"
return
return err_dic
if ttys_n:
(vuart0_valid, vuart1_valid) = get_valid_ttys_for_sos_vuart(ttys_n)
# VUART0 setting
if not launch_flag:
if ttys_n not in list(NATIVE_TTYS_DIC.keys()):
vuart0_setting['ttyS0'] = board_cfg_lib.alloc_irq()
else:
if int(NATIVE_TTYS_DIC[ttys_n]['irq']) >= 16:
vuart0_setting[ttys_n] = board_cfg_lib.alloc_irq()
else:
vuart0_setting[ttys_n] = NATIVE_TTYS_DIC[ttys_n]['irq']
else:
vuart1_valid = ['ttyS1']
if launch_flag:
SOS_UART1_VALID_NUM += vuart1_valid[0]
return
# VUART1 setting
# The IRQ of vUART1(COM2) might be hard-coded by SOS ACPI table(i.e. host ACPI),
# so we had better follow native COM2 IRQ assignment for vUART1 if COM2 is a legacy ttyS,
# otherwise function of vUART1 would be failed. If host COM2 does not exist or it is a PCI ttyS,
# then we could allocate a free IRQ for vUART1.
if 'ttyS1' in NATIVE_TTYS_DIC.keys() \
and NATIVE_TTYS_DIC['ttyS1']['type'] == "portio" \
and 'irq' in list(NATIVE_TTYS_DIC['ttyS1'].keys()) \
and NATIVE_TTYS_DIC['ttyS1']['irq'] < 16:
vuart1_setting['ttyS1'] = NATIVE_TTYS_DIC['ttyS1']['irq']
else:
vuart1_setting[vuart1_valid[0]] = board_cfg_lib.alloc_irq()
return (err_dic, vuart0_setting, vuart1_setting)
def generate_file(config):
"""
Start to generate board.c
:param config: it is a file pointer of board information for writing to
"""
board_cfg_lib.get_valid_irq(common.BOARD_INFO_FILE)
# get the vuart0/vuart1 which user chosed from scenario.xml of board_private section
(err_dic, ttys_n) = board_cfg_lib.parser_hv_console()
if err_dic:
return err_dic
# parse sos_bootargs/rootfs/console
(err_dic, sos_cmdlines, sos_rootfs, vuart0_dic, vuart1_dic) = parse_boot_info()
if err_dic:
return err_dic
if vuart0_dic:
# parse to get poart/base of vuart0/vuart1
vuart0_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart0_dic.keys())[0]]
vuart0_irq = vuart0_dic[list(vuart0_dic.keys())[0]]
vuart1_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart1_dic.keys())[0]]
vuart1_irq = vuart1_dic[list(vuart1_dic.keys())[0]]
# parse the setting ttys vuatx dic: {vmid:base/irq}
vuart0_setting = Vuart()
vuart1_setting = Vuart()
vuart0_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 0)
vuart1_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 1)
# sos command lines information
sos_cmdlines = [i for i in sos_cmdlines[0].split() if i != '']
# get native rootfs list from board_info.xml
(root_devs, root_dev_num) = board_cfg_lib.get_rootfs(common.BOARD_INFO_FILE)
# start to generate misc_cfg.h
print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
print("{}".format(MISC_CFG_HEADER), file=config)
print("", file=config)
# define rootfs with macro
#for i in range(root_dev_num):
# print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]), file=config)
# sos rootfs and console
if "SOS_VM" in common.VM_TYPES.values():
print('#define SOS_ROOTFS\t\t"root={} "'.format(sos_rootfs[0]), file=config)
if ttys_n:
print('#define SOS_CONSOLE\t\t"console={} "'.format(ttys_n), file=config)
else:
print('#define SOS_CONSOLE\t\t" "', file=config)
# sos com base/irq
i_type = 0
for vm_i,vm_type in common.VM_TYPES.items():
if vm_type == "SOS_VM":
i_type = vm_i
break
if "SOS_VM" in common.VM_TYPES.values():
if vuart0_dic:
print("#define SOS_COM1_BASE\t\t{}U".format(vuart0_port_base), file=config)
print("#define SOS_COM1_IRQ\t\t{}U".format(vuart0_irq), file=config)
else:
print("#define SOS_COM1_BASE\t\t0U", file=config)
print("#define SOS_COM1_IRQ\t\t0U", file=config)
if vuart1_setting[i_type]['base'] != "INVALID_COM_BASE":
print("#define SOS_COM2_BASE\t\t{}U".format(vuart1_port_base), file=config)
print("#define SOS_COM2_IRQ\t\t{}U".format(vuart1_irq), file=config)
# sos boot command line
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
sos_bootarg_diff(sos_cmdlines, config)
print("", file=config)
if board_cfg_lib.is_rdt_supported():
print("", file=config)
common_clos_max = board_cfg_lib.get_common_clos_max()
max_cache_clos_entries = common_clos_max
if board_cfg_lib.is_cdp_enabled():
max_cache_clos_entries = 2 * common_clos_max
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(max_cache_clos_entries), file=config)
(rdt_resources, rdt_res_clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "CLOS_MASK")
mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE, "FEATURES", "RDT", "MBA_DELAY")
idx = 0
for mba_delay_mask in mba_delay_list:
print("#define MBA_MASK_{}\t\t\t{}U".format(idx, mba_delay_mask), file=config)
idx += 1
idx = 0
for cat_mask in cat_mask_list:
print("#define CLOS_MASK_{}\t\t\t{}U".format(idx, cat_mask), file=config)
idx += 1
print("", file=config)
vm0_pre_launch = False
common.get_vm_types()
for vm_idx,vm_type in common.VM_TYPES.items():
if vm_idx == 0 and scenario_cfg_lib.VM_DB[vm_type]['load_type'] == "PRE_LAUNCHED_VM":
vm0_pre_launch = True
if vm0_pre_launch and board_cfg_lib.is_tpm_passthru():
print("#define VM0_PASSTHROUGH_TPM", file=config)
print("#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL", file=config)
print("#define VM0_TPM_BUFFER_SIZE 0x5000UL", file=config)
print("", file=config)
print("{}".format(MISC_CFG_END), file=config)
return err_dic
def generate_file(config):
"""
Start to generate board.c
:param config: it is a file pointer of board information for writing to
"""
board_cfg_lib.get_valid_irq(common.BOARD_INFO_FILE)
# get the vuart0/vuart1 which user chosed from scenario.xml of board_private section
(err_dic, ttys_n) = board_cfg_lib.parser_hv_console()
if err_dic:
return err_dic
# parse sos_bootargs/rootfs/console
(err_dic, sos_cmdlines, sos_rootfs, vuart0_dic,
vuart1_dic) = parse_boot_info()
if err_dic:
return err_dic
if vuart0_dic:
# parse to get poart/base of vuart0/vuart1
vuart0_port_base = board_cfg_lib.LEGACY_TTYS[list(
vuart0_dic.keys())[0]]
vuart0_irq = vuart0_dic[list(vuart0_dic.keys())[0]]
vuart1_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart1_dic.keys())[0]]
vuart1_irq = vuart1_dic[list(vuart1_dic.keys())[0]]
# parse the setting ttys vuatx dic: {vmid:base/irq}
vuart0_setting = Vuart()
vuart1_setting = Vuart()
vuart0_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 0)
vuart1_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 1)
# sos command lines information
sos_cmdlines = [i for i in sos_cmdlines[0].split() if i != '']
# add maxcpus parameter into sos cmdlines if there are pre-launched VMs
pcpu_list = board_cfg_lib.get_processor_info()
cpu_affinity = common.get_leaf_tag_map(common.SCENARIO_INFO_FILE,
"cpu_affinity", "pcpu_id")
pre_cpu_list = []
sos_cpu_num = 0
for vmid, cpu_list in cpu_affinity.items():
if vmid in common.VM_TYPES and cpu_list != [None]:
vm_type = common.VM_TYPES[vmid]
load_type = ''
if vm_type in scenario_cfg_lib.VM_DB:
load_type = scenario_cfg_lib.VM_DB[vm_type]['load_type']
if load_type == "PRE_LAUNCHED_VM":
pre_cpu_list += cpu_list
elif load_type == "SOS_VM":
sos_cpu_num += len(cpu_list)
if sos_cpu_num == 0:
sos_cpu_num_max = len(list(set(pcpu_list) - set(pre_cpu_list)))
else:
sos_cpu_num_max = sos_cpu_num
if sos_cpu_num_max > 0:
sos_cmdlines.append('maxcpus=' + str(sos_cpu_num_max))
# get native rootfs list from board_info.xml
(root_devs,
root_dev_num) = board_cfg_lib.get_rootfs(common.BOARD_INFO_FILE)
# start to generate misc_cfg.h
print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
print("{}".format(MISC_CFG_HEADER), file=config)
print("", file=config)
# define rootfs with macro
#for i in range(root_dev_num):
# print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]), file=config)
# sos rootfs and console
if "SOS_VM" in common.VM_TYPES.values():
print('#define SOS_ROOTFS\t\t"root={} "'.format(sos_rootfs[0]),
file=config)
if ttys_n:
print('#define SOS_CONSOLE\t\t"console={} "'.format(ttys_n),
file=config)
else:
print('#define SOS_CONSOLE\t\t" "', file=config)
# sos com base/irq
i_type = 0
for vm_i, vm_type in common.VM_TYPES.items():
if vm_type == "SOS_VM":
i_type = vm_i
break
if "SOS_VM" in common.VM_TYPES.values():
if vuart0_dic:
print("#define SOS_COM1_BASE\t\t{}U".format(vuart0_port_base),
file=config)
print("#define SOS_COM1_IRQ\t\t{}U".format(vuart0_irq),
file=config)
else:
print("#define SOS_COM1_BASE\t\t0U", file=config)
print("#define SOS_COM1_IRQ\t\t0U", file=config)
if vuart1_setting[i_type]['base'] != "INVALID_COM_BASE":
print("#define SOS_COM2_BASE\t\t{}U".format(vuart1_port_base),
file=config)
print("#define SOS_COM2_IRQ\t\t{}U".format(vuart1_irq),
file=config)
# sos boot command line
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
sos_bootarg_diff(sos_cmdlines, config)
print("", file=config)
cpu_affinity_per_vm_gen(config)
common_clos_max = board_cfg_lib.get_common_clos_max()
max_mba_clos_entries = common_clos_max
max_cache_clos_entries = common_clos_max
comments_max_clos = '''
/*
* The maximum CLOS that is allowed by ACRN hypervisor,
* its value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0])
* among all supported RDT resources in the platform. In other words, it is
* min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent
* CLOS allocations between all the RDT resources.
*/'''
comments_max_mba_clos = '''
/*
* Max number of Cache Mask entries corresponding to each CLOS.
* This can vary if CDP is enabled vs disabled, as each CLOS entry
* will have corresponding cache mask values for Data and Code when
* CDP is enabled.
*/'''
comments_max_cache_clos = '''
/* Max number of MBA delay entries corresponding to each CLOS. */'''
if board_cfg_lib.is_cdp_enabled():
max_cache_clos_entries_cdp_enable = 2 * common_clos_max
(res_info, rdt_res_clos_max,
clos_max_mask_list) = board_cfg_lib.clos_info_parser(
common.BOARD_INFO_FILE)
common_clos_max_cdp_disable = min(rdt_res_clos_max)
print("#ifdef CONFIG_RDT_ENABLED", file=config)
print("#ifdef CONFIG_CDP_ENABLED", file=config)
print(comments_max_clos, file=config)
print("#define HV_SUPPORTED_MAX_CLOS\t{}U".format(common_clos_max),
file=config)
print(comments_max_cache_clos, file=config)
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(
max_cache_clos_entries_cdp_enable),
file=config)
print("#else", file=config)
print(comments_max_clos, file=config)
print("#define HV_SUPPORTED_MAX_CLOS\t{}U".format(
common_clos_max_cdp_disable),
file=config)
print(comments_max_cache_clos, file=config)
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(
max_cache_clos_entries),
file=config)
print("#endif", file=config)
print(comments_max_mba_clos, file=config)
print("#define MAX_MBA_CLOS_NUM_ENTRIES\t{}U".format(
max_mba_clos_entries),
file=config)
else:
print("#ifdef CONFIG_RDT_ENABLED", file=config)
print(comments_max_clos, file=config)
print("#define HV_SUPPORTED_MAX_CLOS\t{}U".format(common_clos_max),
file=config)
print(comments_max_mba_clos, file=config)
print("#define MAX_MBA_CLOS_NUM_ENTRIES\t{}U".format(
max_mba_clos_entries),
file=config)
print(comments_max_cache_clos, file=config)
print("#define MAX_CACHE_CLOS_NUM_ENTRIES\t{}U".format(
max_cache_clos_entries),
file=config)
if not board_cfg_lib.is_rdt_supported():
print("#endif", file=config)
print("", file=config)
if board_cfg_lib.is_rdt_supported():
(rdt_resources, rdt_res_clos_max,
_) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
cat_mask_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE,
"FEATURES", "RDT", "CLOS_MASK")
mba_delay_list = common.get_hv_item_tag(common.SCENARIO_INFO_FILE,
"FEATURES", "RDT", "MBA_DELAY")
idx = 0
for mba_delay_mask in mba_delay_list:
print("#define MBA_MASK_{}\t\t\t{}U".format(idx, mba_delay_mask),
file=config)
idx += 1
idx = 0
for cat_mask in cat_mask_list:
print("#define CLOS_MASK_{}\t\t\t{}U".format(idx, cat_mask),
file=config)
idx += 1
print("", file=config)
clos_per_vm_gen(config)
print("#endif", file=config)
print("", file=config)
vm0_pre_launch = False
common.get_vm_types()
for vm_idx, vm_type in common.VM_TYPES.items():
if vm_idx == 0 and scenario_cfg_lib.VM_DB[vm_type][
'load_type'] == "PRE_LAUNCHED_VM":
vm0_pre_launch = True
if vm0_pre_launch and board_cfg_lib.is_tpm_passthru():
tpm2_passthru_enabled = common.get_leaf_tag_map_bool(
common.SCENARIO_INFO_FILE, "mmio_resources", "TPM2")
if 0 in tpm2_passthru_enabled and tpm2_passthru_enabled[0]:
print("#define VM0_PASSTHROUGH_TPM", file=config)
print("#define VM0_TPM_BUFFER_BASE_ADDR 0xFED40000UL",
file=config)
gpa = common.hpa2gpa(0, 0xFED40000, 0x5000)
print(
"#define VM0_TPM_BUFFER_BASE_ADDR_GPA 0x{:X}UL".format(gpa),
file=config)
print("#define VM0_TPM_BUFFER_SIZE 0x5000UL", file=config)
print("", file=config)
pci_dev_num_per_vm_gen(config)
boot_args_per_vm_gen(config)
pt_intx_num_vm0_gen(config)
swsram_base_gpa_gen(config)
print("{}".format(MISC_CFG_END), file=config)
return err_dic
def generate_file(config):
"""
Start to generate board.c
:param config: it is a file pointer of board information for writing to
"""
board_cfg_lib.get_valid_irq(common.BOARD_INFO_FILE)
# get cpu processor list
cpu_list = board_cfg_lib.get_processor_info()
max_cpu_num = len(cpu_list)
# get the vuart0/vuart1 which user chosed from scenario.xml of board_private section
(err_dic, ttys_n) = board_cfg_lib.parser_hv_console()
if err_dic:
return err_dic
# parse sos_bootargs/rootfs/console
(err_dic, sos_cmdlines, sos_rootfs, vuart0_dic, vuart1_dic) = parse_boot_info()
if err_dic:
return err_dic
if vuart0_dic:
# parse to get poart/base of vuart0/vuart1
vuart0_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart0_dic.keys())[0]]
vuart0_irq = vuart0_dic[list(vuart0_dic.keys())[0]]
vuart1_port_base = board_cfg_lib.LEGACY_TTYS[list(vuart1_dic.keys())[0]]
vuart1_irq = vuart1_dic[list(vuart1_dic.keys())[0]]
# parse the setting ttys vuatx dic: {vmid:base/irq}
vuart0_setting = Vuart()
vuart1_setting = Vuart()
vuart0_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 0)
vuart1_setting = common.get_vuart_info_id(common.SCENARIO_INFO_FILE, 1)
# sos command lines information
sos_cmdlines = [i for i in sos_cmdlines[0].split() if i != '']
# get native rootfs list from board_info.xml
(root_devs, root_dev_num) = board_cfg_lib.get_rootfs(common.BOARD_INFO_FILE)
# start to generate misc_cfg.h
print("{0}".format(board_cfg_lib.HEADER_LICENSE), file=config)
print("{}".format(MISC_CFG_HEADER), file=config)
# define CONFIG_MAX_PCPCU_NUM
print("#define MAX_PCPU_NUM\t{}U".format(max_cpu_num), file=config)
# set macro of max clos number
(_, clos_max, _) = board_cfg_lib.clos_info_parser(common.BOARD_INFO_FILE)
if len(clos_max) != 0:
common_clos_max = min(clos_max)
else:
common_clos_max = 0
print("#define MAX_PLATFORM_CLOS_NUM\t{}U".format(common_clos_max), file=config)
# define rootfs with macro
for i in range(root_dev_num):
print('#define ROOTFS_{}\t\t"root={} "'.format(i, root_devs[i]), file=config)
# sos rootfs and console
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
print('#define SOS_ROOTFS\t\t"root={} "'.format(sos_rootfs[0]), file=config)
if ttys_n:
print('#define SOS_CONSOLE\t\t"console={} "'.format(ttys_n), file=config)
else:
print('#define SOS_CONSOLE\t\t" "', file=config)
# sos com base/irq
i_type = 0
for vm_i,vm_type in common.VM_TYPES.items():
if vm_type == "SOS_VM":
i_type = vm_i
break
if "SOS_VM" in common.VM_TYPES.values():
if vuart0_dic:
print("#define SOS_COM1_BASE\t\t{}U".format(vuart0_port_base), file=config)
print("#define SOS_COM1_IRQ\t\t{}U".format(vuart0_irq), file=config)
else:
print("#define SOS_COM1_BASE\t\t0U", file=config)
print("#define SOS_COM1_IRQ\t\t0U", file=config)
if vuart1_setting[i_type]['base'] != "INVALID_COM_BASE":
print("#define SOS_COM2_BASE\t\t{}U".format(vuart1_port_base), file=config)
print("#define SOS_COM2_IRQ\t\t{}U".format(vuart1_irq), file=config)
# sos boot command line
print("", file=config)
if "SOS_VM" in common.VM_TYPES.values():
sos_bootarg_diff(sos_cmdlines, config)
# set macro for HIDDEN PTDEVS
print("", file=config)
if board_cfg_lib.BOARD_NAME in list(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB):
print("#define MAX_HIDDEN_PDEVS_NUM {}U".format(len(board_cfg_lib.KNOWN_HIDDEN_PDEVS_BOARD_DB[board_cfg_lib.BOARD_NAME])), file=config)
else:
print("#define MAX_HIDDEN_PDEVS_NUM 0U", file=config)
# generate HI_MMIO_START/HI_MMIO_END
find_hi_mmio_window(config)
print("", file=config)
print("{}".format(MISC_CFG_END), file=config)
return err_dic
