def get_memval(self, iaddr, address, size, signextend=False):
try:
if address.is_address():
if address.is_global_address(
) and self.libapp and self.instaticlib:
return self.libglobalmem.get(iaddr, address, size)
if address.is_global_address and self.is_libc_ctype_toupper(
address.get_offset_value()):
return self._handle_ctype_toupper()
elif address.is_global_address and self.is_libc_ctype_b(
address.get_offset_value()):
return self._handle_ctype_b()
elif address.is_global_address():
return self.globalmem.get(iaddr, address, size)
elif address.is_stack_address():
return self.stackmem.get(iaddr, address, size)
elif address.is_base_address() and address.get_base(
) in self.basemem:
return self.basemem[address.get_base()].get(
iaddr, address, size)
else:
self.add_logmsg(
iaddr, 'base ' + address.base + ' not yet supported')
return SV.mk_undefined_simvalue(size)
else:
self.add_logmsg(
iaddr, 'attempt to address memory with absolute value: ' +
str(address))
return SV.simUndefinedDW
except SU.CHBSimError as e:
self.add_logmsg(
iaddr, 'no value for memory address ' + str(address) + ' (' +
str(e) + ')')
return SV.simUndefinedDW
def get_rhs(self, iaddr, op, opsize=4):
opkind = op.get_mips_opkind()
if opkind.is_mips_register() or opkind.is_mips_special_register():
reg = opkind.get_mips_register()
return self.get_regval(iaddr, reg, opsize)
elif opkind.is_mips_immediate():
return SV.mk_simvalue(opsize, opkind.get_value())
elif opkind.is_mips_indirect_register():
reg = opkind.get_mips_register()
offset = opkind.get_offset()
regval = self.get_regval(iaddr, reg)
if not regval.is_defined():
return SV.mk_undefined_simvalue(opsize)
if regval.is_string_address() and opsize == 1:
regstring = regval.get_string()
if offset == len(regstring):
return SV.SimByteValue(0)
elif offset > len(regstring):
print('Accessing string value out of bounds')
exit(1)
else:
return SV.mk_simvalue(ord(regval.get_string()[offset]),
size=1)
if regval.is_symbol():
base = regval.get_name()
if not base in self.basemem:
self.basemem[base] = MM.MIPSimBaseMemory(self, base)
address = SSV.mk_base_address(base, offset=offset)
return self.get_memval(iaddr, address, opsize)
elif regval.is_address():
address = regval.add_offset(offset)
return self.get_memval(iaddr, address, opsize)
elif (regval.is_literal() and self.instaticlib
and regval.value > self.libimagebase.get_offset_value()):
address = SSV.mk_global_address(regval.value + offset)
return self.get_memval(iaddr, address, opsize)
elif (regval.is_literal()
and regval.value > self.imagebase.get_offset_value()):
address = SSV.mk_global_address(regval.value + offset)
return self.get_memval(iaddr, address, opsize)
elif regval.is_literal(
) and regval.value <= self.imagebase.get_offset_value():
print('Invalid address: ' + str(regval))
return SV.mk_undefined_simvalue(opsize)
elif regval.is_string_address():
s = regval.get_string()
if offset < len(s):
return SV.mk_simvalue(ord(s[0]), size=opsize)
elif offset == len(s):
return SV.mk_simvalue(0, size=opsize) # null terminator
else:
raise SU.CHBSimError(
self, iaddr, 'string address: ' + s.get_string() +
' with offset: ' + str(offset))
elif regval.is_libc_table_address():
return SSV.mk_libc_table_value(regval.name)
elif regval.is_libc_table_value():
return SSV.mk_libc_table_value_deref(regval.name,
regval.offset)
else:
raise SU.CHBSimError(
self, iaddr,
'register used in indirect register operand has no base: '
+ str(regval) + ' (' + str(self.imagebase) + ')')
else:
raise SU.CHBSimError(self, iaddr,
'rhs-op not recognized(C): ' + str(op))