def setUp(self): """ Records the randomness used. """ # record the randomness used in case the test fails: rand_seed = int(time.time()) sr.seed(rand_seed) print("seed for this test: " + str(rand_seed))
def setUp(self): """ Records the randomness used. """ # record the randomness used in case the test fails: rand_seed = int(time.time()) sr.seed(rand_seed) print("seed for this test: " + str(rand_seed))
def test_f3_circuit_maker(self): """ Tests that the family 3 circuit makers function as desired. """ fho = tfho.test_file_handle_object() W = 5 D = 6 gate_maker = g.TYPE_TO_FAM3_GATE_GEN[g.TEST_TYPES.RANDOM] # family 3 files: circuit_file_name = "circuit_file" circuit_file = fho.get_file_object(circuit_file_name, 'w') input_file_name = "input_file" input_file = fho.get_file_object(input_file_name, 'w') output_file_name = "output_file" output_file = fho.get_file_object(output_file_name, 'w') F = 3 # make a family 3 circuit: sr.seed(self.rand_seed) gen = g.f3_circuit_maker(W, D, circuit_file, input_file, output_file, gate_maker) gen.generate() # obtain strings representing the contents of all the resulting files: circuit_string = fho.get_file(circuit_file_name).getvalue() input_string = fho.get_file(input_file_name).getvalue() output_string = fho.get_file(output_file_name).getvalue() # make sure that the input begins and ends with a bracket: self.assertEqual("[", input_string[0]) self.assertEqual("]", input_string[-1]) # make sure that each input element is a bit: for bit in input_string[1:-1]: self.assertTrue((bit == '0') or (bit == '1')) # make sure that the output is a bit: self.assertTrue((output_string == '0') or (output_string == '1')) # make sure that the circuit header contains the correct values: circuit_header = circuit_string.split("\n")[0] (W_string, D_string, F_string) = circuit_header.split(",") W_value = int(W_string.split("=")[-1]) D_value = int(D_string.split("=")[-1]) F_value = int(F_string.split("=")[-1]) self.assertEqual(W, W_value) self.assertEqual(D, D_value) self.assertEqual(F, F_value)
def test_f3_circuit_maker(self): """ Tests that the family 3 circuit makers function as desired. """ fho = tfho.test_file_handle_object() W = 5 D = 6 gate_maker = g.TYPE_TO_FAM3_GATE_GEN[g.TEST_TYPES.RANDOM] # family 3 files: circuit_file_name = "circuit_file" circuit_file = fho.get_file_object(circuit_file_name, 'w') input_file_name = "input_file" input_file = fho.get_file_object(input_file_name, 'w') output_file_name = "output_file" output_file = fho.get_file_object(output_file_name, 'w') F = 3 # make a family 3 circuit: sr.seed(self.rand_seed) gen = g.f3_circuit_maker(W, D, circuit_file, input_file, output_file, gate_maker) gen.generate() # obtain strings representing the contents of all the resulting files: circuit_string = fho.get_file(circuit_file_name).getvalue() input_string = fho.get_file(input_file_name).getvalue() output_string = fho.get_file(output_file_name).getvalue() # make sure that the input begins and ends with a bracket: self.assertEqual("[", input_string[0]) self.assertEqual("]", input_string[-1]) # make sure that each input element is a bit: for bit in input_string[1:-1]: self.assertTrue((bit == '0') or (bit == '1')) # make sure that the output is a bit: self.assertTrue((output_string == '0') or (output_string == '1')) # make sure that the circuit header contains the correct values: circuit_header = circuit_string.split("\n")[0] (W_string, D_string, F_string) = circuit_header.split(",") W_value = int(W_string.split("=")[-1]) D_value = int(D_string.split("=")[-1]) F_value = int(F_string.split("=")[-1]) self.assertEqual(W, W_value) self.assertEqual(D, D_value) self.assertEqual(F, F_value)
def __handle_seed(self, randseed): """Handles a new randomness seed appropriately.""" sr.seed(int(randseed))
def test_f2_circuit_maker(self): """ Tests that the family 2 circuit makers function as desired. Makes sure that the trimming and no-trimming methods both produce the same inputs and outputs under the same randomness, and have the same circuit headers. """ fho = tfho.test_file_handle_object() W = 5 G = 20 fg = .9 X = 10 fx = .85 gate_maker = g.TYPE_TO_GATE_GEN[g.TEST_TYPES.RANDOM] # family 2 files: t_circuit_file_name = "circuit_file_trimming" t_circuit_file = fho.get_file_object(t_circuit_file_name, 'w') t_input_file_name = "input_file_trimming" t_input_file = fho.get_file_object(t_input_file_name, 'w') t_output_file_name = "output_file_trimming" t_output_file = fho.get_file_object(t_output_file_name, 'w') nt_circuit_file_name = "circuit_file_no_trimming" nt_circuit_file = fho.get_file_object(nt_circuit_file_name, 'w') nt_input_file_name = "input_file_no_trimming" nt_input_file = fho.get_file_object(nt_input_file_name, 'w') nt_output_file_name = "output_file_no_trimming" nt_output_file = fho.get_file_object(nt_output_file_name, 'w') level_type_array = [ g.LEVEL_TYPES.XOR, g.LEVEL_TYPES.RANDOM, g.LEVEL_TYPES.XOR ] F = 2 # make a family 1 circuit with trimming: sr.seed(self.rand_seed) t_gen = g.f1f2_circuit_maker_with_trimming_switch( W, G, fg, t_circuit_file, t_input_file, t_output_file, X, fx, gate_maker, level_type_array, True) t_gen.generate() # make a family 1 circuit without trimming, with the same randomness: sr.seed(self.rand_seed) nt_gen = g.f1f2_circuit_maker_with_trimming_switch( W, G, fg, nt_circuit_file, nt_input_file, nt_output_file, X, fx, gate_maker, level_type_array, False) nt_gen.generate() # obtain strings representing the contents of all the resulting files: t_circuit_string = fho.get_file(t_circuit_file_name).getvalue() t_input_string = fho.get_file(t_input_file_name).getvalue() t_output_string = fho.get_file(t_output_file_name).getvalue() nt_circuit_string = fho.get_file(nt_circuit_file_name).getvalue() nt_input_string = fho.get_file(nt_input_file_name).getvalue() nt_output_string = fho.get_file(nt_output_file_name).getvalue() # make sure that the inputs and outputs produced by the trimming and # no trimming algorithms are the same: self.assertEqual(t_input_string, nt_input_string) self.assertEqual(t_output_string, nt_output_string) # make sure that the input begins and ends with a bracket: self.assertEqual("[", t_input_string[0]) self.assertEqual("]", t_input_string[-1]) # make sure that each input element is a bit: for bit in t_input_string[1:-1]: self.assertTrue((bit == '0') or (bit == '1')) # make sure that the output is a bit: self.assertTrue((t_output_string == '0') or (t_output_string == '1')) # make sure that the two circuit headers are the same, and that they # contain the correct values: t_circuit_header = t_circuit_string.split("\n")[0] nt_circuit_header = nt_circuit_string.split("\n")[0] self.assertEqual(t_circuit_header, nt_circuit_header) (W_string, G_string, X_string, F_string) = t_circuit_header.split(",") W_value = int(W_string.split("=")[-1]) G_value = int(G_string.split("=")[-1]) X_value = int(X_string.split("=")[-1]) F_value = int(F_string.split("=")[-1]) self.assertEqual(W, W_value) self.assertEqual(G, G_value) self.assertEqual(F, F_value)
def test_f2_circuit_maker(self): """ Tests that the family 2 circuit makers function as desired. Makes sure that the trimming and no-trimming methods both produce the same inputs and outputs under the same randomness, and have the same circuit headers. """ fho = tfho.test_file_handle_object() W = 5 G = 20 fg = .9 X = 10 fx = .85 gate_maker = g.TYPE_TO_GATE_GEN[g.TEST_TYPES.RANDOM] # family 2 files: t_circuit_file_name = "circuit_file_trimming" t_circuit_file = fho.get_file_object(t_circuit_file_name, 'w') t_input_file_name = "input_file_trimming" t_input_file = fho.get_file_object(t_input_file_name, 'w') t_output_file_name = "output_file_trimming" t_output_file = fho.get_file_object(t_output_file_name, 'w') nt_circuit_file_name = "circuit_file_no_trimming" nt_circuit_file = fho.get_file_object(nt_circuit_file_name, 'w') nt_input_file_name = "input_file_no_trimming" nt_input_file = fho.get_file_object(nt_input_file_name, 'w') nt_output_file_name = "output_file_no_trimming" nt_output_file = fho.get_file_object(nt_output_file_name, 'w') level_type_array = [g.LEVEL_TYPES.XOR, g.LEVEL_TYPES.RANDOM, g.LEVEL_TYPES.XOR] F = 2 # make a family 1 circuit with trimming: sr.seed(self.rand_seed) t_gen = g.f1f2_circuit_maker_with_trimming_switch(W, G, fg, t_circuit_file, t_input_file, t_output_file, X, fx, gate_maker, level_type_array, True) t_gen.generate() # make a family 1 circuit without trimming, with the same randomness: sr.seed(self.rand_seed) nt_gen = g.f1f2_circuit_maker_with_trimming_switch(W, G, fg, nt_circuit_file, nt_input_file, nt_output_file, X, fx, gate_maker, level_type_array, False) nt_gen.generate() # obtain strings representing the contents of all the resulting files: t_circuit_string = fho.get_file(t_circuit_file_name).getvalue() t_input_string = fho.get_file(t_input_file_name).getvalue() t_output_string = fho.get_file(t_output_file_name).getvalue() nt_circuit_string = fho.get_file(nt_circuit_file_name).getvalue() nt_input_string = fho.get_file(nt_input_file_name).getvalue() nt_output_string = fho.get_file(nt_output_file_name).getvalue() # make sure that the inputs and outputs produced by the trimming and # no trimming algorithms are the same: self.assertEqual(t_input_string, nt_input_string) self.assertEqual(t_output_string, nt_output_string) # make sure that the input begins and ends with a bracket: self.assertEqual("[", t_input_string[0]) self.assertEqual("]", t_input_string[-1]) # make sure that each input element is a bit: for bit in t_input_string[1:-1]: self.assertTrue((bit == '0') or (bit == '1')) # make sure that the output is a bit: self.assertTrue((t_output_string == '0') or (t_output_string == '1')) # make sure that the two circuit headers are the same, and that they # contain the correct values: t_circuit_header = t_circuit_string.split("\n")[0] nt_circuit_header = nt_circuit_string.split("\n")[0] self.assertEqual(t_circuit_header, nt_circuit_header) (W_string, G_string, X_string, F_string) = t_circuit_header.split(",") W_value = int(W_string.split("=")[-1]) G_value = int(G_string.split("=")[-1]) X_value = int(X_string.split("=")[-1]) F_value = int(F_string.split("=")[-1]) self.assertEqual(W, W_value) self.assertEqual(G, G_value) self.assertEqual(F, F_value)