def main():
parser = argparse.ArgumentParser(description="LiteDRAM Bench on KCU105")
parser.add_argument("--uart", default="crossover", help="Selected UART: crossover (default) or serial")
parser.add_argument("--build", action="store_true", help="Build bitstream")
parser.add_argument("--with-bist", action="store_true", help="Add BIST Generator/Checker")
parser.add_argument("--load", action="store_true", help="Load bitstream")
parser.add_argument("--load-bios", action="store_true", help="Load BIOS")
parser.add_argument("--set-sys-clk", default=None, help="Set sys_clk")
parser.add_argument("--test", action="store_true", help="Run Full Bench")
args = parser.parse_args()
soc = BenchSoC(uart=args.uart, with_bist=args.with_bist)
builder = Builder(soc, csr_csv="csr.csv")
builder.build(run=args.build)
if args.load:
prog = soc.platform.create_programmer()
prog.load_bitstream(os.path.join(builder.gateware_dir, soc.build_name + ".bit"))
if args.load_bios:
from common import s7_load_bios
s7_load_bios("build/kcu105/software/bios/bios.bin")
if args.set_sys_clk is not None:
from common import us_set_sys_clk
us_set_sys_clk(clk_freq=float(args.config), vco_freq=soc.crg.main_pll.compute_config()["vco"])
if args.test:
from common import us_bench_test
us_bench_test(
freq_min = 80e6,
freq_max = 180e6,
freq_step = 1e6,
vco_freq = soc.crg.pll.compute_config()["vco"],
bios_filename = "build/kcu105/software/bios/bios.bin")
def main():
parser = argparse.ArgumentParser(description="LiteDRAM Bench on XCU1525")
parser.add_argument("--uart",
default="crossover",
help="Selected UART: crossover (default) or serial")
parser.add_argument("--build", action="store_true", help="Build bitstream")
parser.add_argument("--channel",
default="0",
help="DDRAM channel 0 (default), 1, 2 or 3")
parser.add_argument("--with-bist",
action="store_true",
help="Add BIST Generator/Checker")
parser.add_argument("--with-analyzer",
action="store_true",
help="Add Analyzer")
parser.add_argument("--load", action="store_true", help="Load bitstream")
parser.add_argument("--load-bios", action="store_true", help="Load BIOS")
parser.add_argument("--sys-clk-freq",
default=None,
help="Set sys_clk_freq")
parser.add_argument("--test", action="store_true", help="Run Full Bench")
args = parser.parse_args()
soc = BenchSoC(uart=args.uart,
channel=int(args.channel, 0),
with_bist=args.with_bist,
with_analyzer=args.with_analyzer)
builder = Builder(soc,
output_dir=f"build/xcu1525_ch{args.channel}",
csr_csv="csr.csv")
builder.build(run=args.build)
if args.load:
prog = soc.platform.create_programmer()
prog.load_bitstream(
os.path.join(builder.gateware_dir, soc.build_name + ".bit"))
if args.load_bios:
from common import load_bios
load_bios(f"build/xcu1525_ch{args.channel}/software/bios/bios.bin")
if args.sys_clk_freq is not None:
from common import us_set_sys_clk
us_set_sys_clk(clk_freq=float(args.sys_clk_freq),
vco_freq=soc.crg.main_pll.compute_config()["vco"])
if args.test:
from common import us_bench_test
us_bench_test(freq_min=80e6,
freq_max=180e6,
freq_step=1e6,
vco_freq=soc.crg.pll.compute_config()["vco"],
bios_filename=
f"build/xcu1525_ch{args.channel}/software/bios/bios.bin")
