def get_senses(Current, Item, Params, Stack):
if Item[0] in ['=', '<=']:
Srcs = extract_sigs(Item[2])
for X in Srcs:
SenseAlwaysList[X] = 1
elif Item[0] in ['if', 'ifelse']:
Srcs = extract_sigs(Item[1])
for X in Srcs:
SenseAlwaysList[X] = 1
else:
logs.log_error('get_senses got %s' % str(Item))
def drive_assist2(Current, Item, Params, Stack):
Sofar = Params[0]
if not Item:
return
if Item[0] == '<=':
Dsts = extract_sigs(Item[1])
Srcs = extract_sigs(Item[2])
for Dst in Dsts:
Stcks = support_set(Stack)
for Src in Srcs + Stcks:
add_edged_drives(Dst, Src)
if Item[0] == '=':
logs.log_errx(112, '"=" assign in edged always %s' % str(Item))
def create_drive_table(Current):
for HAS in Current.hard_assigns:
Dst1 = HAS[0]
Src1 = HAS[1]
Dsts = extract_sigs(Dst1)
Srcs = extract_sigs(Src1)
if not compatible_width(Dst1, Src1, Current):
logs.log_errx(
1, 'diff width hard_assign (%d) != (%d) %s <= %s ;' %
(get_width(Dst1, Current), get_width(
Src1, Current), pexpr(Dst1), pexpr(Src1)))
for Dst in Dsts:
for Src in Srcs:
add_drives(Dst, Src)
create_always_drive_tables(Current)
def check_double_dst(Current, Dst, AlwInd):
Dsts = extract_sigs(Dst)
for Sig in Dsts:
if Sig in AlwaysAssign:
if AlwInd != AlwaysAssign[Sig]:
logs.log_errx(103, 'var %s assigned in two alwayses' % Sig)
else:
AlwaysAssign[Sig] = AlwInd
def register_instances_usage(Env, Current):
for Inst in Current.insts:
Obj = Current.insts[Inst]
Type = Obj.Type
if Type not in Env.Modules:
SonNets = []
else:
Son = Env.Modules[Type]
SonNets = Son.nets
for Pin in Obj.conns:
Sig = Obj.conns[Pin]
Nets = extract_sigs(Sig)
for Net in Nets:
if Pin in SonNets:
(Dir, W) = SonNets[Pin]
if 'input' in Dir:
Used[Net] = 1
else:
incr_driven(Net, (Pin, Type))
else:
Mentioned[Net] = 1
for Param in Current.parameters:
Mentioned[Param] = 1