Beispiel #1
0
def test():
    filename = os.path.dirname(os.path.abspath(__file__)) + '/nested_led.v'
    conv = hardcheck.convert_from_file('blinkled', filename)
    code = conv.to_verilog()

    from pyverilog.vparser.parser import VerilogParser
    from pyverilog.ast_code_generator.codegen import ASTCodeGenerator
    parser = VerilogParser()
    expected_ast = parser.parse(expected_verilog)
    codegen = ASTCodeGenerator()
    expected_code = codegen.visit(expected_ast)

    assert (expected_code == code)
Beispiel #2
0
from __future__ import absolute_import
from __future__ import print_function
import sys
import os

# the next line can be removed after installation
sys.path.insert(0, os.path.dirname(os.path.dirname(os.path.dirname(
    os.path.dirname(os.path.dirname(os.path.abspath(__file__)))))))

from veriloggen import *
import hardcheck

if __name__ == '__main__':
    filename = os.path.dirname(os.path.abspath(__file__)) + '/cpr_ram.v'
    conv = hardcheck.convert_from_file('main', filename)
    conv_verilog = conv.to_verilog()
    print(conv_verilog)
from __future__ import absolute_import
from __future__ import print_function
import sys
import os

# the next line can be removed after installation
sys.path.insert(
    0,
    os.path.dirname(
        os.path.dirname(
            os.path.dirname(
                os.path.dirname(os.path.dirname(os.path.abspath(__file__)))))))

from veriloggen import *
import veriloggen.resolver.resolver as resolver
import hardcheck

if __name__ == '__main__':
    filename = os.path.dirname(os.path.abspath(__file__)) + '/nested_led.v'
    conv = hardcheck.convert_from_file('blinkled', filename)
    conv_verilog = conv.to_verilog()
    print(conv_verilog)