def _declr(self):
assert int(
self.DEPTH
) > 0, "FifoAsync is disabled in this case, do not use it entirely"
assert isPow2(self.DEPTH), "FifoAsync DEPTH has to be power of 2"
# pow 2 because of gray conter counters
if int(self.EXPORT_SIZE) or int(self.EXPORT_SPACE):
raise NotImplementedError()
self.dataIn_clk = Clk()
self.dataOut_clk = Clk()
self.rst_n = Rst_n()
with self._paramsShared():
with self._associated(clk=self.dataIn_clk):
self.dataIn = FifoWriter()
with self._associated(clk=self.dataOut_clk):
self.dataOut = FifoReader()._m()
self.pWr = GrayCntr()
self.pRd = GrayCntr()
self.addrW = log2ceil(self.DEPTH)
for cntr in [self.pWr, self.pRd]:
cntr.DATA_WIDTH.set(self.addrW)
def _declr(self):
assert int(
self.DEPTH
) > 0, "FifoAsync is disabled in this case, do not use it entirely"
assert isPow2(
self.DEPTH), f"DEPTH has to be power of 2, is {self.DEPTH:d}"
# pow 2 because of gray conter counters
if self.EXPORT_SIZE or self.EXPORT_SPACE:
raise NotImplementedError()
self.dataIn_clk = Clk()
self.dataIn_clk.FREQ = self.IN_FREQ
self.dataOut_clk = Clk()
self.dataOut_clk.FREQ = self.OUT_FREQ
with self._paramsShared():
with self._associated(clk=self.dataIn_clk):
self.dataIn_rst_n = Rst_n()
with self._associated(rst=self.dataIn_rst_n):
self.dataIn = FifoWriter()
with self._associated(clk=self.dataOut_clk):
self.dataOut_rst_n = Rst_n()
with self._associated(rst=self.dataOut_rst_n):
self.dataOut = FifoReader()._m()
self.AW = log2ceil(self.DEPTH)
def _declr(self):
assert self.DEPTH > 0,\
"Fifo is disabled in this case, do not use it entirely"
addClkRstn(self)
with self._paramsShared():
self.dataIn = FifoWriter()
self.dataOut = FifoReader()._m()
self._declr_size_and_space()
def _declr(self):
assert int(
self.DEPTH
) > 0, "Fifo is disabled in this case, do not use it entirely"
addClkRstn(self)
with self._paramsShared():
self.dataIn = FifoWriter()
self.dataOut = FifoReader()._m()
if self.EXPORT_SIZE:
self.size = VectSignal(log2ceil(self.DEPTH + 1), signed=False)._m()
if self.EXPORT_SPACE:
self.space = VectSignal(log2ceil(self.DEPTH + 1),
signed=False)._m()
def _declr(self):
assert int(self.DEPTH) > 0, \
"Fifo is disabled in this case, do not use it entirely"
assert int(self.DEPTH) > 1, \
"Use register instead"
addClkRstn(self)
with self._paramsShared():
self.dataIn = FifoWriter()
self.dataOut = FifoReader()._m()
fc = self.dataOut_copy_frame = VldSynced()
fc.DATA_WIDTH = 1
self._declr_size_and_space()
if self.EXPORT_SIZE or self.EXPORT_SPACE:
raise NotImplementedError()
def _declr(self):
addClkRstn(self)
self.din = FifoWriter()
self.dout = FifoWriter()._m()