Beispiel #1
0
    def __init__(self,
                 bios_flash_offset,
                 sys_clk_freq=int(12e6),
                 with_led_chaser=True,
                 **kwargs):
        kwargs["uart_name"] = "usb_acm"  # Enforce UART to USB-ACM
        platform = fomu_pvt.Platform()

        # Disable Integrated ROM/SRAM since too large for iCE40 and UP5K has specific SPRAM.
        kwargs["integrated_sram_size"] = 0
        kwargs["integrated_rom_size"] = 0

        # Set CPU variant / reset address
        kwargs[
            "cpu_reset_address"] = self.mem_map["spiflash"] + bios_flash_offset

        # Serial -----------------------------------------------------------------------------------
        # FIXME: do proper install of ValentyUSB.
        os.system(
            "git clone https://github.com/litex-hub/valentyusb -b hw_cdc_eptri"
        )
        sys.path.append("valentyusb")

        # SoCCore ----------------------------------------------------------------------------------
        SoCCore.__init__(self,
                         platform,
                         sys_clk_freq,
                         ident="LiteX SoC on Fomu",
                         ident_version=True,
                         **kwargs)

        # CRG --------------------------------------------------------------------------------------
        self.submodules.crg = _CRG(platform, sys_clk_freq)

        # 128KB SPRAM (used as SRAM) ---------------------------------------------------------------
        self.submodules.spram = Up5kSPRAM(size=128 * kB)
        self.bus.add_slave("sram", self.spram.bus, SoCRegion(size=128 * kB))

        # SPI Flash --------------------------------------------------------------------------------
        self.add_spi_flash(mode="1x", dummy_cycles=8)

        # Add ROM linker region --------------------------------------------------------------------
        self.bus.add_region(
            "rom",
            SoCRegion(origin=self.mem_map["spiflash"] + bios_flash_offset,
                      size=32 * kB,
                      linker=True))

        # Leds -------------------------------------------------------------------------------------
        if with_led_chaser:
            self.submodules.leds = LedChaser(
                pads=platform.request_all("user_led_n"),
                sys_clk_freq=sys_clk_freq)
Beispiel #2
0
    def __init__(self,
                 bios_flash_offset,
                 spi_flash_module="AT25SF161",
                 sys_clk_freq=int(12e6),
                 with_led_chaser=True,
                 **kwargs):
        kwargs["uart_name"] = "usb_acm"  # Enforce UART to USB-ACM
        platform = fomu_pvt.Platform()

        # Disable Integrated ROM/SRAM since too large for iCE40 and UP5K has specific SPRAM.
        kwargs["integrated_sram_size"] = 0
        kwargs["integrated_rom_size"] = 0

        # Set CPU variant / reset address
        kwargs[
            "cpu_reset_address"] = self.mem_map["spiflash"] + bios_flash_offset

        # Serial -----------------------------------------------------------------------------------
        # FIXME: do proper install of ValentyUSB.
        os.system(
            "git clone https://github.com/litex-hub/valentyusb -b hw_cdc_eptri"
        )
        sys.path.append("valentyusb")

        # SoCCore ----------------------------------------------------------------------------------
        SoCCore.__init__(self,
                         platform,
                         sys_clk_freq,
                         ident="LiteX SoC on Fomu",
                         ident_version=True,
                         **kwargs)

        # CRG --------------------------------------------------------------------------------------
        self.submodules.crg = _CRG(platform, sys_clk_freq)

        # 128KB SPRAM (used as 64kB SRAM / 64kB RAM) -----------------------------------------------
        self.submodules.spram = Up5kSPRAM(size=128 * kB)
        self.bus.add_slave("psram", self.spram.bus, SoCRegion(size=128 * kB))
        self.bus.add_region(
            "sram",
            SoCRegion(origin=self.bus.regions["psram"].origin + 0 * kB,
                      size=64 * kB,
                      linker=True))
        if not self.integrated_main_ram_size:
            self.bus.add_region(
                "main_ram",
                SoCRegion(origin=self.bus.regions["psram"].origin + 64 * kB,
                          size=64 * kB,
                          linker=True))

        # SPI Flash --------------------------------------------------------------------------------
        from litespi.modules import AT25SF161, GD25Q16C, MX25R1635F, W25Q128JV
        from litespi.opcodes import SpiNorFlashOpCodes as Codes

        # lambdas for lazy module instantiation.
        spi_flash_modules = {
            "AT25SF161": lambda: AT25SF161(Codes.READ_1_1_4),
            "GD25Q16C": lambda: GD25Q16C(Codes.READ_1_1_1),
            "MX25R1635F": lambda: MX25R1635F(Codes.READ_1_1_4),
            "W25Q128JV": lambda: W25Q128JV(Codes.READ_1_1_4),
        }
        self.add_spi_flash(mode="4x",
                           module=spi_flash_modules[spi_flash_module](),
                           with_master=False)

        # Add ROM linker region --------------------------------------------------------------------
        self.bus.add_region(
            "rom",
            SoCRegion(origin=self.mem_map["spiflash"] + bios_flash_offset,
                      size=32 * kB,
                      linker=True))

        # Leds -------------------------------------------------------------------------------------
        if with_led_chaser:
            self.submodules.leds = LedChaser(
                pads=platform.request_all("user_led_n"),
                sys_clk_freq=sys_clk_freq)