def cmd_erase(self, ui, args):
"""erase flash"""
# check for erase all
if len(args) == 1 and args[0] == '*':
ui.put('erase all: ')
n_errors = self.driver.erase_all()
ui.put('done (%d errors)\n' % n_errors)
return
# memory region erase
x = util.mem_args(ui, args, self.device)
if x is None:
return
(adr, n) = x
if n is None:
ui.put('bad erase length\n')
return
r = mem.region(None, adr, n)
# build a list of regions to be erased
erase_list = [x for x in self.driver.sector_list() if r.overlap(x)]
if len(erase_list) == 0:
ui.put('nothing to erase\n')
return
# do the erase
ui.put('erasing : ')
progress = util.progress(ui, 1, len(erase_list))
n_erased = 0
n_errors = 0
for x in erase_list:
n_errors += self.driver.erase(x)
n_erased += 1
progress.update(n_erased)
progress.erase()
ui.put('done (%d errors)\n' % n_errors)
def STM32F091xC_fixup(d):
d.soc_name = 'STM32F091xC'
d.cpu_info.deviceNumInterrupts = 32
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
# More decode for the DBGMCU registers
f = d.DBGMCU.IDCODE.REV_ID
f.enumvals = soc.make_enumvals(f, _rev_id_enumset)
f = d.DBGMCU.IDCODE.DEV_ID
f.enumvals = soc.make_enumvals(f, _dev_id_enumset)
# more decode for the GPIO registers
gpio_decodes(d, ('A', 'B', 'C', 'D', 'E', 'F'), _STM32F091xC_altfunc)
# TODO: RCC.AHBENR.IOPEEN is missing from the svd
# memory and misc periperhals
d.insert(soc.make_peripheral('sram', 0x20000000, 32 << 10, None, 'sram'))
d.insert(
soc.make_peripheral('flash_system', 0x1fffd800, 8 << 10, None,
'flash system memory'))
d.insert(
soc.make_peripheral('flash_main', 0x08000000, 256 << 10, None,
'flash main memory'))
d.insert(
soc.make_peripheral('flash_option', 0x1ffff800, 16, None,
'flash option memory'))
d.insert(
soc.make_peripheral('UID', 0x1ffff7ac, 12, _uuid_regset,
'Unique Device ID'))
d.insert(
soc.make_peripheral('FLASH_SIZE', 0x1ffff7cc, 2, _flash_size_regset,
'Flash Size'))
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 24 << 10)
def cmd_write(self, ui,args):
"""write to flash"""
x = util.file_mem_args(ui, args, self.device)
if x is None:
return
(name, adr, n) = x
# check the file
filesize = util.file_arg(ui, name)
if filesize is None:
return
# round up the filesize - the io object will return 0xff for any bytes beyond EOF
filesize = util.roundup(filesize, 32)
if n is None:
# no length on the command line - program the filesize
n = filesize
if n >= filesize:
# region is bigger than the file - program the filesize
n = filesize
else:
# region is smaller than the file - truncate the file
ui.put('%s is larger than target memory: %d > %d bytes (truncating)\n' % (name, filesize, n))
# make sure the target region in flash is suitable
mr = mem.region(None, adr, n)
msg = self.driver.check_region(mr)
if msg is not None:
ui.put('%s\n' % msg)
return
# read from file, write to memory
mf = iobuf.read_file(ui, 'writing %s (%d bytes):' % (name, n), name, n)
self.driver.write(mr, mf)
mf.close(rate = True)
def STM32F429xI_fixup(d):
d.soc_name = 'STM32F429xI'
d.cpu_info.nvicPrioBits = 4
d.cpu_info.deviceNumInterrupts = 90
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
# more decode for the DBG registers
f = d.DBG.DBGMCU_IDCODE.REV_ID
f.enumvals = soc.make_enumvals(f, _rev_id_enumset)
f = d.DBG.DBGMCU_IDCODE.DEV_ID
f.enumvals = soc.make_enumvals(f, _dev_id_enumset)
# fix up the OSPEEDR labels ST messed up
for x in ('A','B','C','D','E','F','G','H','I','J','K'):
d.peripherals['GPIO%c' % x].rename_register('GPIOB_OSPEEDR', 'OSPEEDR')
# more decode for the GPIO registers
gpio_decodes(d, ('A','B','C','D','E','F','G','H','I','J','K'), _STM32F429xI_altfunc)
# memory and misc periperhals
d.insert(soc.make_peripheral('sram', 0x20000000, 256 << 10, None, 'sram'))
d.insert(soc.make_peripheral('ccm_sram', 0x10000000, 64 << 10, None, 'core coupled memory sram'))
d.insert(soc.make_peripheral('flash_system', 0x1fff0000, 30 << 10, None, 'flash system memory'))
d.insert(soc.make_peripheral('flash_main', 0x08000000, 2 << 20, None, 'flash main memory'))
d.insert(soc.make_peripheral('flash_opt_bank1', 0x1fffc000, 16, None, 'flash option memory'))
d.insert(soc.make_peripheral('flash_opt_bank2', 0x1ffec000, 16, None, 'flash option memory'))
d.insert(soc.make_peripheral('flash_otp', 0x1fff7800, 528, None, 'flash otp memory'))
d.insert(soc.make_peripheral('UID', 0x1fff7a10, 12, _uuid_regset, 'Unique Device ID'))
d.insert(soc.make_peripheral('FLASH_SIZE', 0x1fff7a22, 2, _flash_size_regset, 'Flash Size'))
# the size of this peripheral seems wrong
d.OTG_HS_PWRCLK.size = 1 << 10
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 32 << 10)
def EFM32LG990F256_fixup(d):
d.soc_name = 'EFM32LG990F256'
d.cpu_info.nvicPrioBits = 3
d.cpu_info.deviceNumInterrupts = 40
# memory and misc periperhals
d.insert(soc.make_peripheral('flash', 0x00000000, 256 << 10, None, 'flash'))
d.insert(soc.make_peripheral('sram', 0x20000000, 32 << 10, None, 'sram'))
d.insert(soc.make_peripheral('DI', 0x0FE08000, 0x200, _device_info_regset, 'Device Information'))
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 24 << 10)
def EFM32LG990F256_fixup(d):
d.soc_name = "EFM32LG990F256"
d.cpu_info.nvicPrioBits = 3
d.cpu_info.deviceNumInterrupts = 40
# memory and misc periperhals
d.insert(soc.make_peripheral("flash", 0x00000000, 256 << 10, None, "flash"))
d.insert(soc.make_peripheral("sram", 0x20000000, 32 << 10, None, "sram"))
d.insert(soc.make_peripheral("DI", 0x0FE08000, 0x200, _device_info_regset, "Device Information"))
# ram buffer for flash writing
d.rambuf = mem.region("rambuf", 0x20000000 + 512, 24 << 10)
def STM32F407xx_fixup(d):
d.soc_name = 'STM32F407xx'
d.cpu_info.nvicPrioBits = 4
d.cpu_info.deviceNumInterrupts = 82
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
# more decode for the DBG registers
f = d.DBG.DBGMCU_IDCODE.REV_ID
f.enumvals = soc.make_enumvals(f, _rev_id_enumset)
f = d.DBG.DBGMCU_IDCODE.DEV_ID
f.enumvals = soc.make_enumvals(f, _dev_id_enumset)
# more decode for the GPIO registers
gpio_decodes(d, ('A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I'),
_STM32F407xx_altfunc)
# additional interrupts
d.insert(
soc.make_interrupt('HASH_RNG_IRQ', 80,
'Hash and RNG global interrupt'))
d.insert(soc.make_interrupt('FPU_IRQ', 81, 'FPU global interrupt'))
# memory and misc periperhals
d.insert(soc.make_peripheral('sram', 0x20000000, 128 << 10, None, 'sram'))
d.insert(
soc.make_peripheral('ccm_sram', 0x10000000, 8 << 10, None,
'core coupled memory sram'))
d.insert(
soc.make_peripheral('flash_system', 0x1fff0000, 30 << 10, None,
'flash system memory'))
d.insert(
soc.make_peripheral('flash_main', 0x08000000, 1 << 20, None,
'flash main memory'))
d.insert(
soc.make_peripheral('flash_option', 0x1fffc000, 16, None,
'flash option memory'))
d.insert(
soc.make_peripheral('flash_otp', 0x1fff7800, 528, None,
'flash otp memory'))
d.insert(
soc.make_peripheral('UID', 0x1fff7a10, 12, _uuid_regset,
'Unique Device ID'))
d.insert(
soc.make_peripheral('FLASH_SIZE', 0x1fff7a22, 2, _flash_size_regset,
'Flash Size'))
# the size of these peripherals seems wrong
d.OTG_HS_GLOBAL.size = 1 << 10
d.OTG_HS_PWRCLK.size = 1 << 10
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 32 << 10)
def __init__(self, ui, dbgio):
self.ui = ui
self.dbgio = dbgio
self.device = vendor.get_device(self.ui, soc_name)
# add the 8MiB SDRAM
self.device.insert(
soc.make_peripheral('sdram', 0xc0000000, 8 << 20, None,
'external sdram'))
self.dbgio.connect(self.device.cpu_info.name, 'swd')
self.cpu = cortexm.cortexm(self, ui, self.dbgio, self.device)
self.device.bind_cpu(self.cpu)
self.mem = mem.mem(self.cpu)
self.flash = flash.flash(flash_driver.sdrv(self.device), self.device,
self.mem)
gpio_drv = (gpio_driver.drv(self.device, gpio_cfg))
self.gpio = gpio.gpio(gpio_drv)
self.i2c1 = i2c.i2c(i2c_driver.bitbang(gpio_drv, 'PB8', 'PB9'))
self.i2c3 = i2c.i2c(i2c_driver.bitbang(gpio_drv, 'PH7', 'PH8'))
# setup the rtt client
ram = self.device.sram
self.rtt = rtt.rtt(self.cpu, mem.region('ram', ram.address, ram.size))
self.menu_root = (
('cpu', self.cpu.menu, 'cpu functions'),
('da', self.cpu.cmd_disassemble, cortexm.help_disassemble),
('debugger', self.dbgio.menu, 'debugger functions'),
('exit', self.cmd_exit),
('flash', self.flash.menu, 'flash functions'),
('go', self.cpu.cmd_go),
('gpio', self.gpio.menu, 'gpio functions'),
('halt', self.cpu.cmd_halt),
('help', self.ui.cmd_help),
('history', self.ui.cmd_history, cli.history_help),
('i2c1', self.i2c1.menu, 'i2c1 functions'),
('i2c3', self.i2c3.menu, 'i2c3 functions'),
('map', self.device.cmd_map),
('mem', self.mem.menu, 'memory functions'),
('program', self.flash.cmd_program, flash.help_program),
('regs', self.cmd_regs, soc.help_regs),
('rtt', self.rtt.menu, 'rtt client functions'),
('vtable', self.cpu.cmd_vtable),
)
self.ui.cli.set_root(self.menu_root)
self.set_prompt()
self.dbgio.cmd_info(self.ui, None)
def STM32F427xx_fixup(d):
d.cpu_info.nvicPrioBits = 4
d.cpu_info.deviceNumInterrupts = 106
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
# more decode for the DBG registers
f = d.DBG.DBGMCU_IDCODE.REV_ID
f.enumvals = soc.make_enumvals(f, _rev_id_enumset)
f = d.DBG.DBGMCU_IDCODE.DEV_ID
f.enumvals = soc.make_enumvals(f, _dev_id_enumset)
# more decode for the GPIO registers
gpio_decodes(d, ('A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I'),
_STM32F427xx_altfunc)
# sram
d.insert(soc.make_peripheral('sram', 0x20000000, 256 << 10, None, 'sram'))
d.insert(
soc.make_peripheral('ccm_sram', 0x10000000, 64 << 10, None,
'core coupled memory sram'))
d.insert(
soc.make_peripheral('BKPSRAM', 0x40024000, 4 << 10, None,
'backup sram'))
# flash (rm0090 3.4 table 6))
d.insert(
soc.make_peripheral('flash_otp', 0x1fff7800, 528, None,
'flash otp memory'))
d.insert(
soc.make_peripheral('flash_system', 0x1fff0000, 30 << 10, None,
'flash system memory'))
d.insert(
soc.make_peripheral('flash_opt_bank1', 0x1fffc000, 16, None,
'flash option memory'))
d.insert(
soc.make_peripheral('flash_opt_bank2', 0x1ffec000, 16, None,
'flash option memory'))
# misc periperhals
d.insert(
soc.make_peripheral('UID', 0x1fff7a10, 12, _uuid_regset,
'Unique Device ID'))
d.insert(
soc.make_peripheral('FLASH_SIZE', 0x1fff7a22, 2, _flash_size_regset,
'Flash Size'))
# the size of this peripheral seems wrong
d.OTG_HS_PWRCLK.size = 1 << 10
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 32 << 10)
def __init__(self, ui, dbgio):
self.ui = ui
self.dbgio = dbgio
self.device = vendor.get_device(self.ui, soc_name)
self.dbgio.connect(self.device.cpu_info.name, 'swd')
self.cpu = cortexm.cortexm(self, ui, self.dbgio, self.device)
self.device.bind_cpu(self.cpu)
self.mem = mem.mem(self.cpu)
self.flash = flash.flash(flash_driver.sdrv(self.device), self.device,
self.mem)
gpio_drv = (gpio_driver.drv(self.device, gpio_cfg))
self.gpio = gpio.gpio(gpio_drv)
self.i2c = i2c.i2c(i2c_driver.gpio(gpio_drv, 'PB6', 'PB9'))
self.dac = dac.cs43l22(self.i2c, 0x94, self.dac_reset)
# setup the rtt client
ram = self.device.sram
self.rtt = rtt.rtt(self.cpu, mem.region('ram', ram.address, ram.size))
# setup the gdb server
self.gdb = gdb.gdb(self.cpu)
self.menu_root = (
('cpu', self.cpu.menu, 'cpu functions'),
('da', self.cpu.cmd_disassemble, cortexm.help_disassemble),
('dac', self.dac.menu, 'dac functions'),
('debugger', self.dbgio.menu, 'debugger functions'),
('exit', self.cmd_exit),
('flash', self.flash.menu, 'flash functions'),
('gdb', self.gdb.run),
('go', self.cpu.cmd_go),
('gpio', self.gpio.menu, 'gpio functions'),
('halt', self.cpu.cmd_halt),
('help', self.ui.cmd_help),
('history', self.ui.cmd_history, cli.history_help),
('i2c', self.i2c.menu, 'i2c functions'),
('map', self.device.cmd_map),
('mem', self.mem.menu, 'memory functions'),
('program', self.flash.cmd_program, flash.help_program),
('regs', self.cmd_regs, soc.help_regs),
('rtt', self.rtt.menu, 'rtt client functions'),
('vtable', self.cpu.cmd_vtable),
)
self.ui.cli.set_root(self.menu_root)
self.set_prompt()
self.dbgio.cmd_info(self.ui, None)
def __init__(self, ui, dbgio):
self.ui = ui
self.dbgio = dbgio
self.device = vendor.get_device(self.ui, soc_name)
self.dbgio.connect(self.device.cpu_info.name, 'swd')
self.cpu = cortexm.cortexm(self, ui, self.dbgio, self.device)
self.device.bind_cpu(self.cpu)
self.mem = mem.mem(self.cpu)
self.flash = flash.flash(flash_driver.sdrv(self.device), self.device, self.mem)
gpio_drv = (gpio_driver.drv(self.device, gpio_cfg))
self.gpio = gpio.gpio(gpio_drv)
self.i2c = i2c.i2c(i2c_driver.gpio(gpio_drv, 'PB6', 'PB9'))
self.dac = dac.cs43l22(self.i2c, 0x94, self.dac_reset)
# setup the rtt client
ram = self.device.sram
self.rtt = rtt.rtt(self.cpu, mem.region('ram', ram.address, ram.size))
# setup the gdb server
self.gdb = gdb.gdb(self.cpu)
self.menu_root = (
('cpu', self.cpu.menu, 'cpu functions'),
('da', self.cpu.cmd_disassemble, cortexm.help_disassemble),
('dac', self.dac.menu, 'dac functions'),
('debugger', self.dbgio.menu, 'debugger functions'),
('exit', self.cmd_exit),
('flash', self.flash.menu, 'flash functions'),
('gdb', self.gdb.run),
('go', self.cpu.cmd_go),
('gpio', self.gpio.menu, 'gpio functions'),
('halt', self.cpu.cmd_halt),
('help', self.ui.cmd_help),
('history', self.ui.cmd_history, cli.history_help),
('i2c', self.i2c.menu, 'i2c functions'),
('map', self.device.cmd_map),
('mem', self.mem.menu, 'memory functions'),
('program', self.flash.cmd_program, flash.help_program),
('regs', self.cmd_regs, soc.help_regs),
('rtt', self.rtt.menu, 'rtt client functions'),
('vtable', self.cpu.cmd_vtable),
)
self.ui.cli.set_root(self.menu_root)
self.set_prompt()
self.dbgio.cmd_info(self.ui, None)
def STM32L432KC_fixup(d):
d.soc_name = 'STM32L432KC'
d.cpu_info.nvicPrioBits = 4
d.cpu_info.deviceNumInterrupts = 84
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
# ST didn't put DBGMCU in the SVD, so we will add it.
d.insert(
soc.make_peripheral('DBGMCU', 0xe0042000, 1 << 10, _DBGMCU_regset,
'Debug support'))
# more decode for the GPIO registers
gpio_decodes(d, ('A', 'B', 'C', 'D', 'E', 'H'), _STM32L432KC_altfunc)
# memory and misc periperhals
d.insert(soc.make_peripheral('sram1', 0x20000000, 48 << 10, None, 'sram1'))
# sram2 is found in 2 regions of the memory map
d.insert(soc.make_peripheral('sram2a', 0x2000c000, 16 << 10, None,
'sram2'))
d.insert(soc.make_peripheral('sram2b', 0x10000000, 16 << 10, None,
'sram2'))
d.insert(
soc.make_peripheral('flash_system', 0x1fff0000, 28 << 10, None,
'flash system memory'))
d.insert(
soc.make_peripheral('flash_main', 0x08000000, 256 << 10, None,
'flash main memory'))
d.insert(
soc.make_peripheral('flash_otp', 0x1fff7000, 1 << 10, None,
'flash otp memory'))
d.insert(
soc.make_peripheral('flash_option', 0x1fff7800, 16, None,
'flash option memory'))
d.insert(
soc.make_peripheral('UID', 0x1fff7590, 12, _uuid_regset,
'Unique Device ID'))
d.insert(
soc.make_peripheral('FLASH_SIZE', 0x1fff75e0, 2, _flash_size_regset,
'Flash Size'))
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 32 << 10)
def STM32F091xC_fixup(d):
d.soc_name = 'STM32F091xC'
d.cpu_info.deviceNumInterrupts = 32
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
# More decode for the DBGMCU registers
f = d.DBGMCU.IDCODE.REV_ID
f.enumvals = soc.make_enumvals(f, _rev_id_enumset)
f = d.DBGMCU.IDCODE.DEV_ID
f.enumvals = soc.make_enumvals(f, _dev_id_enumset)
# more decode for the GPIO registers
gpio_decodes(d, ('A','B','C','D','E','F'), _STM32F091xC_altfunc)
# TODO: RCC.AHBENR.IOPEEN is missing from the svd
# memory and misc periperhals
d.insert(soc.make_peripheral('sram', 0x20000000, 32 << 10, None, 'sram'))
d.insert(soc.make_peripheral('flash_system', 0x1fffd800, 8 << 10, None, 'flash system memory'))
d.insert(soc.make_peripheral('flash_main', 0x08000000, 256 << 10, None, 'flash main memory'))
d.insert(soc.make_peripheral('flash_option', 0x1ffff800, 16, None, 'flash option memory'))
d.insert(soc.make_peripheral('UID', 0x1ffff7ac, 12, _uuid_regset, 'Unique Device ID'))
d.insert(soc.make_peripheral('FLASH_SIZE', 0x1ffff7cc, 2, _flash_size_regset, 'Flash Size'))
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 24 << 10)
def STM32F303xC_fixup(d):
d.soc_name = 'STM32F303xC'
d.cpu_info.nvicPrioBits = 4
d.cpu_info.deviceNumInterrupts = 84
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
d.remove(d.FPU)
# fix up the name of the FLASH peripheral
d.rename_peripheral('Flash', 'FLASH')
# More decode for the DBGMCU registers
f = d.DBGMCU.IDCODE.REV_ID
f.enumvals = soc.make_enumvals(f, _rev_id_enumset)
f = d.DBGMCU.IDCODE.DEV_ID
f.enumvals = soc.make_enumvals(f, _dev_id_enumset)
# more decode for the GPIO registers
gpio_decodes(d, ('A', 'B', 'C', 'D', 'E', 'F'), _STM32F303xC_altfunc)
# memory and misc periperhals
d.insert(soc.make_peripheral('sram', 0x20000000, 40 << 10, None, 'sram'))
d.insert(
soc.make_peripheral('ccm_sram', 0x10000000, 8 << 10, None,
'core coupled memory sram'))
d.insert(
soc.make_peripheral('flash_system', 0x1fffd800, 8 << 10, None,
'flash system memory'))
d.insert(
soc.make_peripheral('flash_main', 0x08000000, 256 << 10, None,
'flash main memory'))
d.insert(
soc.make_peripheral('flash_option', 0x1ffff800, 16, None,
'flash option memory'))
d.insert(
soc.make_peripheral('UID', 0x1ffff7ac, 12, _uuid_regset,
'Unique Device ID'))
d.insert(
soc.make_peripheral('FLASH_SIZE', 0x1ffff7cc, 2, _flash_size_regset,
'Flash Size'))
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 32 << 10)
def STM32L432KC_fixup(d):
d.soc_name = 'STM32L432KC'
d.cpu_info.nvicPrioBits = 4
d.cpu_info.deviceNumInterrupts = 84
# remove some core peripherals - we'll replace them in the cpu fixup
d.remove(d.NVIC)
# ST didn't put DBGMCU in the SVD, so we will add it.
d.insert(soc.make_peripheral('DBGMCU', 0xe0042000, 1 << 10, _DBGMCU_regset, 'Debug support'))
# more decode for the GPIO registers
gpio_decodes(d, ('A','B','C','D','E','H'), _STM32L432KC_altfunc)
# memory and misc periperhals
d.insert(soc.make_peripheral('sram1', 0x20000000, 48 << 10, None, 'sram1'))
# sram2 is found in 2 regions of the memory map
d.insert(soc.make_peripheral('sram2a', 0x2000c000, 16 << 10, None, 'sram2'))
d.insert(soc.make_peripheral('sram2b', 0x10000000, 16 << 10, None, 'sram2'))
d.insert(soc.make_peripheral('flash_system', 0x1fff0000, 28 << 10, None, 'flash system memory'))
d.insert(soc.make_peripheral('flash_main', 0x08000000, 256 << 10, None, 'flash main memory'))
d.insert(soc.make_peripheral('flash_otp', 0x1fff7000, 1 << 10, None, 'flash otp memory'))
d.insert(soc.make_peripheral('flash_option', 0x1fff7800, 16, None, 'flash option memory'))
d.insert(soc.make_peripheral('UID', 0x1fff7590, 12, _uuid_regset, 'Unique Device ID'))
d.insert(soc.make_peripheral('FLASH_SIZE', 0x1fff75e0, 2, _flash_size_regset, 'Flash Size'))
# ram buffer for flash writing
d.rambuf = mem.region('rambuf', 0x20000000 + 512, 32 << 10)
