def run(board,
rx=None,
tx=None,
rxBank=1,
txBank=1,
algoLatency=0,
masterLatency=0,
rxExtraFrames=0,
txExtraFrames=0):
# logging.info('Masking all buffers')
# cm = hlp.channelMgr(board, enablechans)
# cm = hlp.channelMgr(board)
# rxCfg = mp7.LatencyPathConfigurator(0, 1)
# cm.configureBuffers(mp7.kRx, rxCfg)
# txCfg = mp7.LatencyPathConfigurator(0, 1)
# cm.configureBuffers(mp7.kTx, txCfg)
internalLatency = 32 # 240 Mhz clock cycles
logging.info(
'Internal L1A latency (%s cycles) added to rx and tx latency',
internalLatency)
rxLatency = masterLatency + internalLatency + rxExtraFrames
txLatency = masterLatency + internalLatency + txExtraFrames - algoLatency
if rx is not None:
logging.info('Configuring rx buffers %s to bank %d, latency %d',
rx, rxBank, rxLatency)
cm = board.channelMgr(rx)
rxCfg = mp7.LatencyPathConfigurator(rxBank, rxLatency)
cm.configureBuffers(mp7.kRx, rxCfg)
if tx is not None:
logging.info('Configuring tx buffers %s to bank %d, latency %d',
tx, txBank, txLatency)
cm = board.channelMgr(tx)
txCfg = mp7.LatencyPathConfigurator(txBank, txLatency)
cm.configureBuffers(mp7.kTx, txCfg)
def run(board, group, bankId, depth, enablechans=None):
idmap = {
'rx': mp7.RxTxSelector.kRx,
'tx': mp7.RxTxSelector.kTx,
}
bkind = idmap[group]
cm = hlp.channelMgr(board,enablechans)
pc = mp7.LatencyPathConfigurator(bankId, depth)
logging.info('Configuring buffers in latency mode: bank id = %d, latency = %d', bankId, depth )
cm.configureBuffers(bkind, pc)
def run(board, mode, chset, src, add, inject=None):
cm = hlp.channelMgr(board)
# Set Stage1 Board ID
ctrl = board.getCtrl()
ctrl.getNode('board_id').write(0x2300)
ctrl.getClient().dispatch()
logging.debug('Applying default buffer config')
rxlatency = mp7.LatencyPathConfigurator(0, 1)
cm.configureBuffers(mp7.kRx, rxlatency)
txlatency = mp7.LatencyPathConfigurator(0, 1)
cm.configureBuffers(mp7.kTx, txlatency)
# Stage 1 fibre mapping
# Even channels,
if chset == 'test':
lInsEven = [0]
lInsOdd = [1]
lOuts = [38]
elif chset == 'testsim':
lInsEven = [0] #[ 2*i for i in xrange(18) ] # captures right away
lInsOdd = [1] #[ 2*i+1 for i in xrange(18) ] # captured after 1 bx
lOuts = [4] #range(38,54) # outputs right away
elif chset == 'testsimB':
lInsEven = [4] #[ 2*i for i in xrange(18) ] # captures right away
lInsOdd = [5] #[ 2*i+1 for i in xrange(18) ] # captured after 1 bx
lOuts = [8] #range(38,54) # outputs right away
elif chset == 'full':
lInsEven = range(
0, 36, 2) # [ 2*i for i in xrange(18) ] # captures right away
lInsOdd = range(1, 36,
2) #[ 2*i+1 for i in xrange(18) ] # captured twice
lOuts = range(38, 54) # outputs right away
elif chset == 'debug':
lInsEven = range(0, 36)
lInsOdd = []
lOuts = []
else:
raise ArgumentError('chset can either be test or full')
#
latPropagationCyc = 32
# tx->mgt->rx
latTx2Rx = 39
# for rx->algo->tx
latRx2Tx = 4
# inBaseLatency = latPropagationCyc-latRx2Tx
# outBaseLatency = latPropagationCyc-latRx2Tx
lIns = lInsEven + lInsOdd
# mode = 'algo'
if mode == 'algo':
# Data sources
inSrc = mp7.kRx
outSrc = mp7.kRx
# Data destination
inDest = mp7.kTx
outDest = mp7.kTx
inBaseLatency = latPropagationCyc - latRx2Tx
outBaseLatency = latPropagationCyc - latRx2Tx
elif mode == 'loop':
# Data sources
inSrc = mp7.kTx
outSrc = mp7.kRx
# Data destination
inDest = mp7.kRx
outDest = mp7.kTx
inBaseLatency = latPropagationCyc - latTx2Rx
outBaseLatency = latPropagationCyc - latRx2Tx
print 'inBaseLatency', inBaseLatency
print 'outBaseLatency', outBaseLatency
else:
raise ArgumentError('Unknown mode ' + mode)
if src == 'counts':
# Data source
logging.debug('Configuring pattern generation on tx %s (inputs)',
sorted(lIns))
patt = mp7.TestPathConfigurator(mp7.PathConfigurator.kPattern,
mp7.orbit.Point(0),
board.getMetric())
hlp.channelMgr(board, lIns).configureBuffers(inSrc, patt)
# Outputs
logging.debug('Configuring pattern generation on rx %s (outputs)',
sorted(lOuts))
patt = mp7.TestPathConfigurator(mp7.PathConfigurator.kPattern3G,
mp7.orbit.Point(0),
board.getMetric())
hlp.channelMgr(board, lOuts).configureBuffers(outSrc, patt)
elif src == 'events':
# Data source, tx buffers of input channels
logging.debug('Configuring playback generation on %s %s (inputs)',
inSrc, sorted(lIns))
play = mp7.TestPathConfigurator(mp7.PathConfigurator.kPlayOnce,
mp7.orbit.Point(0),
board.getMetric())
hlp.channelMgr(board, lIns).configureBuffers(inSrc, play)
logging.debug('Configuring strobed playback on %s %s (outputs)',
outSrc, sorted(lOuts))
play = mp7.TestPathConfigurator(mp7.PathConfigurator.kPlayOnce3G,
mp7.orbit.Point(0),
board.getMetric())
hlp.channelMgr(board, lOuts).configureBuffers(outSrc, play)
# Loading events from file
# Input events first
# rxevents = mp7.BoardDataFactory.readFromFile('events/s1golden-clean-strobed/rx_summary.txt')
# txevents = mp7.BoardDataFactory.readFromFile('events/s1golden-clean-strobed/tx_summary.txt')
if inject is None:
rxevents = mp7.BoardDataFactory.generate('generate://pattern')
txevents = mp7.BoardDataFactory.generate(
'generate://3gpattern')
else:
logging.info('Injecting events from %s', inject)
rxevents = mp7.BoardDataFactory.generate('file://' + inject +
'/rx_summary.txt')
txevents = mp7.BoardDataFactory.generate('file://' + inject +
'/tx_summary.txt')
hlp.channelMgr(board, lIns).loadPatterns(inSrc, rxevents)
hlp.channelMgr(board, lOuts).loadPatterns(outSrc, txevents)
else:
raise ArgumentError('WTF!?!?')
# Real latency buffer configuration
# Increase the latency to capture 2 bx ahead
inLatency = inBaseLatency + add
logging.debug(
'Configuring latency buffers even=%s, odd=%s, latency=%d',
lInsEven, lInsOdd, inLatency)
# Dummy inout channels
txlatency = mp7.LatencyPathConfigurator(1, inLatency)
hlp.channelMgr(board, lInsEven).configureBuffers(inDest, txlatency)
txlatency = mp7.LatencyPathConfigurator(2, inLatency)
hlp.channelMgr(board, lInsOdd).configureBuffers(inDest, txlatency)
# Increase the latency to capture 2 bx ahead
outLatency = outBaseLatency + add
logging.debug('Configuring latency buffers outs=%s, latency=%d', lOuts,
outLatency)
# Dummy output channels
txlatency = mp7.LatencyPathConfigurator(3, outLatency)
hlp.channelMgr(board, lOuts).configureBuffers(outDest, txlatency)