def parse_area(self, area, bitstream):
_, ncables = bitstream.read_bitsa([6, 16])
area.cables = [ None ] * ncables
for i in xrange(ncables):
cable = Cable(area)
cable.color, source, src_conn, direction, dest, dest_conn = \
bitstream.read_bitsa([3, 8, 6, 1, 8, 6])
src_module = area.find_module(source)
dest_module = area.find_module(dest)
if invalid_cable(src_module, src_conn, direction, dest_module, dest_conn):
printf('Invalid cable %d: "%s"(%d,%d) -%d-> "%s"(%d,%d)\n',
i, src_module.type.shortnm, src_module.index, src_conn, direction,
dest_module.type.shortnm, dest_module.index, dest_conn)
continue
if direction == 1:
cable.source = src_module.outputs[src_conn]
else:
cable.source = src_module.inputs[src_conn]
cable.dest = dest_module.inputs[dest_conn]
area.cables[i] = cable
cable.source.cables.append(cable)
cable.dest.cables.append(cable)
area.netlist.add(cable.source, cable.dest)
def parse_area(self, area, bitstream):
_, ncables = bitstream.read_bitsa([6, 16])
area.cables = [None] * ncables
for i in xrange(ncables):
cable = Cable(area)
cable.color, source, src_conn, direction, dest, dest_conn = \
bitstream.read_bitsa([3, 8, 6, 1, 8, 6])
src_module = area.find_module(source)
dest_module = area.find_module(dest)
if invalid_cable(src_module, src_conn, direction, dest_module,
dest_conn):
printf('Invalid cable %d: "%s"(%d,%d) -%d-> "%s"(%d,%d)\n', i,
src_module.type.shortnm, src_module.index, src_conn,
direction, dest_module.type.shortnm, dest_module.index,
dest_conn)
continue
if direction == 1:
cable.source = src_module.outputs[src_conn]
else:
cable.source = src_module.inputs[src_conn]
cable.dest = dest_module.inputs[dest_conn]
area.cables[i] = cable
cable.source.cables.append(cable)
cable.dest.cables.append(cable)
area.netlist.add(cable.source, cable.dest)
def parse(self):
lines = self.lines
line = lines.pop(0)
fields = line.split()
if len(fields) > 1:
if len(fields) == 8:
l = fields[0]
line = ' '.join(fields[1:])
lines.insert(0, line)
sect = int(l)
else:
sect = int(line)
if sect:
area = self.patch.voice
else:
area = self.patch.fx
area.cables = []
area.netlist = NetList()
area.cables = [ None ] * len(self.lines)
for i in xrange(len(self.lines)):
values = eval_fields(lines[i])
c = Cable(area)
c.color, dmod, dconn, ddir, smod, sconn, sdir = values
dmodule = area.find_module(dmod)
smodule = area.find_module(smod)
if ddir:
dest = dmodule.outputs[dconn]
else:
dest = dmodule.inputs[dconn]
if sdir:
source = smodule.outputs[sconn]
else:
source = smodule.inputs[sconn]
# if dest is an output, make it the source
if dest.direction:
dest, source = source, dest
area.cables[i] = c
c.source, c.dest = source, dest
source.cables.append(c)
dest.cables.append(c)
# update netlist with source and dest
area.netlist.add(source, dest)
def parse(self):
lines = self.lines
line = lines.pop(0)
fields = line.split()
if len(fields) > 1:
if len(fields) == 8:
l = fields[0]
line = ' '.join(fields[1:])
lines.insert(0, line)
sect = int(l)
else:
sect = int(line)
if sect:
area = self.patch.voice
else:
area = self.patch.fx
area.cables = []
area.netlist = NetList()
area.cables = [None] * len(self.lines)
for i in xrange(len(self.lines)):
values = eval_fields(lines[i])
c = Cable(area)
c.color, dmod, dconn, ddir, smod, sconn, sdir = values
dmodule = area.find_module(dmod)
smodule = area.find_module(smod)
if ddir:
dest = dmodule.outputs[dconn]
else:
dest = dmodule.inputs[dconn]
if sdir:
source = smodule.outputs[sconn]
else:
source = smodule.inputs[sconn]
# if dest is an output, make it the source
if dest.direction:
dest, source = source, dest
area.cables[i] = c
c.source, c.dest = source, dest
source.cables.append(c)
dest.cables.append(c)
# update netlist with source and dest
area.netlist.add(source, dest)