def fetch(adapter_addr, addr, length): cmd = ports.inb(adapter_addr + ds_cmd) ports.outb(adapter_addr + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_START) ports.outb(adapter_addr + ds0_isr, DSIS_RDC) ports.outb(adapter_addr + ds0_rbcr0, length) ports.outb(adapter_addr + ds0_rbcr1, length >> 8) ports.outb(adapter_addr + ds0_rsar0, addr) ports.outb(adapter_addr + ds0_rsar1, addr >> 8) ports.outb(adapter_addr + ds_cmd, DSCM_RREAD | DSCM_PG0 | DSCM_START) #buffer = ports.repinsw(adapter_addr + ne_data, length / 2) #if length & 1: # buffer += ports.inb(adapter_addr + ne_data) buffer = ports.repinsb(adapter_addr + ne_data, length) while not (ports.inb(adapter_addr + ds0_isr) & DSIS_RDC): pass ports.outb(adapter_addr + ds0_isr, DSIS_RDC) ports.outb(adapter_addr + ds_cmd, cmd) return buffer
def init_device(adapter_addr): print "Initializing network device..." print "Resetting device" val = ports.inb(adapter_addr + ne_reset) pause() ports.outb(adapter_addr + ne_reset, val) ports.outb(adapter_addr + ds_cmd, DSCM_STOP | DSCM_NODMA) i = 20000 while i > 0: i = i - 1 if ports.inb(adapter_addr + ds0_isr) & DSIS_RESET: break if not i: print "FAILURE: reset timed out" return print "Device successfully reset" ports.outb(adapter_addr + ds0_isr, 0xFF) ports.outb(adapter_addr + ds0_dcr, DSDC_WTS | DSDC_BMS | DSDC_FT1) ports.outb(adapter_addr + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_STOP) pause() if ports.inb(adapter_addr + ds_cmd) != (DSCM_NODMA | DSCM_PG0 | DSCM_STOP): print "Initialization failed" return ports.outb(adapter_addr + ds0_tcr, 0) ports.outb(adapter_addr + ds0_rcr, DSRC_MON) ports.outb(adapter_addr + ds0_pstart, RBUF / DS_PGSIZE) ports.outb(adapter_addr + ds0_pstop, RBUFEND / DS_PGSIZE) ports.outb(adapter_addr + ds0_bnry, RBUF / DS_PGSIZE) ports.outb(adapter_addr + ds0_imr, 0) ports.outb(adapter_addr + ds0_isr, 0) ports.outb(adapter_addr + ds_cmd, DSCM_NODMA | DSCM_PG1 | DSCM_STOP) ports.outb(adapter_addr + ds1_curr, RBUF / DS_PGSIZE) ports.outb(adapter_addr + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_STOP) data = fetch(adapter_addr, 0, 16) global mac_address mac_address = data[0], data[2], data[4], data[6], data[8], data[10] print mac_address print "Device successfully initialized!"
def init_device(adapter_addr): print "Initializing network device..." print "Resetting device" val = ports.inb(adapter_addr + ne_reset) pause() ports.outb(adapter_addr + ne_reset, val) ports.outb(adapter_addr + ds_cmd, DSCM_STOP | DSCM_NODMA) i = 20000 while i > 0: i = i - 1 if ports.inb(adapter_addr + ds0_isr) & DSIS_RESET: break if not i: print "FAILURE: reset timed out" return print "Device successfully reset" ports.outb(adapter_addr + ds0_isr, 0xFF); ports.outb(adapter_addr + ds0_dcr, DSDC_WTS | DSDC_BMS | DSDC_FT1) ports.outb(adapter_addr + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_STOP) pause() if ports.inb(adapter_addr + ds_cmd) != (DSCM_NODMA | DSCM_PG0 | DSCM_STOP): print "Initialization failed" return ports.outb(adapter_addr + ds0_tcr, 0) ports.outb(adapter_addr + ds0_rcr, DSRC_MON) ports.outb(adapter_addr + ds0_pstart, RBUF/DS_PGSIZE) ports.outb(adapter_addr + ds0_pstop, RBUFEND/DS_PGSIZE) ports.outb(adapter_addr + ds0_bnry, RBUF/DS_PGSIZE) ports.outb(adapter_addr + ds0_imr, 0) ports.outb(adapter_addr + ds0_isr, 0) ports.outb(adapter_addr + ds_cmd, DSCM_NODMA | DSCM_PG1 | DSCM_STOP) ports.outb(adapter_addr + ds1_curr, RBUF/DS_PGSIZE) ports.outb(adapter_addr + ds_cmd, DSCM_NODMA | DSCM_PG0 | DSCM_STOP) data = fetch(adapter_addr, 0, 16) global mac_address mac_address = data[0], data[2], data[4], data[6], data[8], data[10] print mac_address print "Device successfully initialized!"
def set320x200x256(): ports.inb(0x3DA) ports.outb(0, 0x3C0) ports.writevec(0x3C4,0x3C5, 3,1,0xf,0,0xe) # 6 for mode X ports.outb(0x63, 0x3C2) ports.writevec(0x3C4,0x3C5, 3) ports.outb(0x11, 0x3D4) ports.outb( 0, 0x3D5) ports.writevec(0x3D4,0x3D5, 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, 0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9c, 0x0e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3, # 0x00, ..., 0xe3 for mode X 0xff) ports.writevec(0x3CC,0x3CA, 1) ports.writevec(0x3CE,0x3CF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff) ports.inb(0x3DA) ports.writevec(0x3C0,0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x41, 0x00, 0x0F, 0x00) ports.inb(0x3DA) ports.outb(0x20, 0x3C0)
def set80x25(): ports.inb(0x3DA) ports.outb(0, 0x3C0) ports.writevec(0x3C4,0x3C5, 1,0,3,0,2) ports.outb(0x67, 0x3C2) ports.writevec(0x3C4,0x3C5, 3) ports.outb(0x11, 0x3D4) ports.outb( 0, 0x3D5) ports.writevec(0x3D4,0x3D5, 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, 0xff) ports.writevec(0x3CC,0x3CA, 1) ports.writevec(0x3CE,0x3CF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff) ports.inb(0x3DA) ports.writevec(0x3C0,0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x0C, 0x00, 0x0F, 0x08) ports.inb(0x3DA) ports.outb(0x20, 0x3C0)
def set640x480x16(): ports.inb(0x3DA) ports.outb(0, 0x3C0) ports.writevec(0x3C4,0x3C5, 1,1,4,0,6) ports.outb(0xe3, 0x3C2) ports.writevec(0x3C4,0x3C5, 3) ports.outb(0x11, 0x3D4) ports.outb( 0, 0x3D5) ports.writevec(0x3D4,0x3D5, 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3, 0xff) ports.writevec(0x3CC,0x3CA, 1) ports.writevec(0x3CE,0x3CF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff) ports.inb(0x3DA) ports.writevec(0x3C0,0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00) ports.inb(0x3DA) ports.outb(0x20, 0x3C0)
def set80x25(): ports.inb(0x3DA) ports.outb(0, 0x3C0) ports.writevec(0x3C4, 0x3C5, 1, 0, 3, 0, 2) ports.outb(0x67, 0x3C2) ports.writevec(0x3C4, 0x3C5, 3) ports.outb(0x11, 0x3D4) ports.outb(0, 0x3D5) ports.writevec(0x3D4, 0x3D5, 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, 0xff) ports.writevec(0x3CC, 0x3CA, 1) ports.writevec(0x3CE, 0x3CF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff) ports.inb(0x3DA) ports.writevec(0x3C0, 0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x0C, 0x00, 0x0F, 0x08) ports.inb(0x3DA) ports.outb(0x20, 0x3C0)
def set640x480x16(): ports.inb(0x3DA) ports.outb(0, 0x3C0) ports.writevec(0x3C4, 0x3C5, 1, 1, 4, 0, 6) ports.outb(0xe3, 0x3C2) ports.writevec(0x3C4, 0x3C5, 3) ports.outb(0x11, 0x3D4) ports.outb(0, 0x3D5) ports.writevec(0x3D4, 0x3D5, 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3, 0xff) ports.writevec(0x3CC, 0x3CA, 1) ports.writevec(0x3CE, 0x3CF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff) ports.inb(0x3DA) ports.writevec(0x3C0, 0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, 0x0F, 0x00) ports.inb(0x3DA) ports.outb(0x20, 0x3C0)
def set320x200x256(): ports.inb(0x3DA) ports.outb(0, 0x3C0) ports.writevec(0x3C4, 0x3C5, 3, 1, 0xf, 0, 0xe) # 6 for mode X ports.outb(0x63, 0x3C2) ports.writevec(0x3C4, 0x3C5, 3) ports.outb(0x11, 0x3D4) ports.outb(0, 0x3D5) ports.writevec( 0x3D4, 0x3D5, 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f, 0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9c, 0x0e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3, # 0x00, ..., 0xe3 for mode X 0xff) ports.writevec(0x3CC, 0x3CA, 1) ports.writevec(0x3CE, 0x3CF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff) ports.inb(0x3DA) ports.writevec(0x3C0, 0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x41, 0x00, 0x0F, 0x00) ports.inb(0x3DA) ports.outb(0x20, 0x3C0)
ports.outb(r[i], 0x3C9) ports.outb(g[i], 0x3C9) ports.outb(b[i], 0x3C9) i = i + 1 # initialize the palette r = "\00\00\00\00\052\052\052\052\025\025\025\025\077\077\077\077\00\05\010\013\016\021\024\030\034\040\044\050\055\062\070\077\00\020\037\057\077\077\077\077\077\077\077\077\077\057\037\020\00\00\00\00\00\00\00\00\037\047\057\067\077\077\077\077\077\077\077\077\077\067\057\047\037\037\037\037\037\037\037\037\055\061\066\072\077\077\077\077\077\077\077\077\077\072\066\061\055\055\055\055\055\055\055\055\00\07\016\025\034\034\034\034\034\034\034\034\034\025\016\07\00\00\00\00\00\00\00\00\016\021\025\030\034\034\034\034\034\034\034\034\034\030\025\021\016\016\016\016\016\016\016\016\024\026\030\032\034\034\034\034\034\034\034\034\034\032\030\026\024\024\024\024\024\024\024\024\00\04\010\014\020\020\020\020\020\020\020\020\020\014\010\04\00\00\00\00\00\00\00\00\010\012\014\016\020\020\020\020\020\020\020\020\020\016\014\012\010\010\010\010\010\010\010\010\013\014\015\017\020\020\020\020\020\020\020\020\020\017\015\014\013\013\013\013\013\013\013\013\00\00\00\00\00\00\077" g = "\00\00\052\052\00\00\025\052\025\025\077\077\025\025\077\077\00\05\010\013\016\021\024\030\034\040\044\050\055\062\070\077\00\00\00\00\00\00\00\00\00\020\037\057\077\077\077\077\077\077\077\077\077\057\037\020\037\037\037\037\037\037\037\037\037\047\057\067\077\077\077\077\077\077\077\077\077\067\057\047\055\055\055\055\055\055\055\055\055\061\066\072\077\077\077\077\077\077\077\077\077\072\066\061\00\00\00\00\00\00\00\00\00\07\016\025\035\034\034\034\034\034\034\034\034\025\016\07\016\016\016\016\016\016\016\016\016\021\025\030\034\034\034\034\034\034\034\034\034\030\025\021\024\024\024\024\024\024\024\024\024\026\030\032\034\034\034\034\034\034\034\034\034\032\030\026\00\00\00\00\00\00\00\00\00\04\010\014\020\020\020\020\020\020\020\020\020\014\010\04\010\010\010\010\010\010\010\010\010\012\014\016\020\020\020\020\020\020\020\020\020\016\014\012\013\013\013\013\013\013\013\013\013\014\015\017\020\020\020\020\020\020\020\020\020\017\015\014\00\00\00\00\00\00\077" b = "\00\052\00\052\00\052\00\052\025\077\025\077\025\077\025\077\00\05\010\013\016\021\024\030\034\040\044\050\055\062\070\077\077\077\077\077\077\057\037\020\00\00\00\00\00\00\00\00\00\020\037\057\077\077\077\077\077\077\077\077\077\067\057\047\037\037\037\037\037\037\037\037\037\047\057\067\077\077\077\077\077\077\077\077\077\072\066\061\055\055\055\055\055\055\055\055\055\061\066\072\077\077\077\077\034\034\034\034\034\025\016\07\00\00\00\00\00\00\00\00\00\07\016\025\034\034\034\034\034\034\034\034\034\030\025\021\016\016\016\016\016\016\016\016\016\021\025\030\034\034\034\034\034\034\034\034\034\032\030\026\024\024\024\024\024\024\024\024\024\026\030\032\034\034\034\034\020\020\020\020\020\014\010\04\00\00\00\00\00\00\00\00\00\04\010\014\020\020\020\020\020\020\020\020\020\016\014\012\010\010\010\010\010\010\010\010\010\012\014\016\020\020\020\020\020\020\020\020\020\017\015\014\013\013\013\013\013\013\013\013\013\014\015\017\020\020\020\020\00\00\00\00\00\00\077" ##################### # set up the palette ##################### ports.inb(0x3DA) ports.writevec(0x3C0,0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F) vgadefaultpalette() ###################### # for now, these must be called in 320x200x256 def vgaunchain(): ports.outb(4, 0x3CE); ports.outb(2, 0x3CF) # plane 2 ports.writevec(0x3C4,0x3C5, 3,1,4,0,6) # unchained ports.outb(0x14, 0x3D4); ports.outb(0x00, 0x3D5) ports.outb(0x17, 0x3D4); ports.outb(0xe3, 0x3D5)
ports.outb(g[i], 0x3C9) ports.outb(b[i], 0x3C9) i = i + 1 # initialize the palette r = "\00\00\00\00\052\052\052\052\025\025\025\025\077\077\077\077\00\05\010\013\016\021\024\030\034\040\044\050\055\062\070\077\00\020\037\057\077\077\077\077\077\077\077\077\077\057\037\020\00\00\00\00\00\00\00\00\037\047\057\067\077\077\077\077\077\077\077\077\077\067\057\047\037\037\037\037\037\037\037\037\055\061\066\072\077\077\077\077\077\077\077\077\077\072\066\061\055\055\055\055\055\055\055\055\00\07\016\025\034\034\034\034\034\034\034\034\034\025\016\07\00\00\00\00\00\00\00\00\016\021\025\030\034\034\034\034\034\034\034\034\034\030\025\021\016\016\016\016\016\016\016\016\024\026\030\032\034\034\034\034\034\034\034\034\034\032\030\026\024\024\024\024\024\024\024\024\00\04\010\014\020\020\020\020\020\020\020\020\020\014\010\04\00\00\00\00\00\00\00\00\010\012\014\016\020\020\020\020\020\020\020\020\020\016\014\012\010\010\010\010\010\010\010\010\013\014\015\017\020\020\020\020\020\020\020\020\020\017\015\014\013\013\013\013\013\013\013\013\00\00\00\00\00\00\077" g = "\00\00\052\052\00\00\025\052\025\025\077\077\025\025\077\077\00\05\010\013\016\021\024\030\034\040\044\050\055\062\070\077\00\00\00\00\00\00\00\00\00\020\037\057\077\077\077\077\077\077\077\077\077\057\037\020\037\037\037\037\037\037\037\037\037\047\057\067\077\077\077\077\077\077\077\077\077\067\057\047\055\055\055\055\055\055\055\055\055\061\066\072\077\077\077\077\077\077\077\077\077\072\066\061\00\00\00\00\00\00\00\00\00\07\016\025\035\034\034\034\034\034\034\034\034\025\016\07\016\016\016\016\016\016\016\016\016\021\025\030\034\034\034\034\034\034\034\034\034\030\025\021\024\024\024\024\024\024\024\024\024\026\030\032\034\034\034\034\034\034\034\034\034\032\030\026\00\00\00\00\00\00\00\00\00\04\010\014\020\020\020\020\020\020\020\020\020\014\010\04\010\010\010\010\010\010\010\010\010\012\014\016\020\020\020\020\020\020\020\020\020\016\014\012\013\013\013\013\013\013\013\013\013\014\015\017\020\020\020\020\020\020\020\020\020\017\015\014\00\00\00\00\00\00\077" b = "\00\052\00\052\00\052\00\052\025\077\025\077\025\077\025\077\00\05\010\013\016\021\024\030\034\040\044\050\055\062\070\077\077\077\077\077\077\057\037\020\00\00\00\00\00\00\00\00\00\020\037\057\077\077\077\077\077\077\077\077\077\067\057\047\037\037\037\037\037\037\037\037\037\047\057\067\077\077\077\077\077\077\077\077\077\072\066\061\055\055\055\055\055\055\055\055\055\061\066\072\077\077\077\077\034\034\034\034\034\025\016\07\00\00\00\00\00\00\00\00\00\07\016\025\034\034\034\034\034\034\034\034\034\030\025\021\016\016\016\016\016\016\016\016\016\021\025\030\034\034\034\034\034\034\034\034\034\032\030\026\024\024\024\024\024\024\024\024\024\026\030\032\034\034\034\034\020\020\020\020\020\014\010\04\00\00\00\00\00\00\00\00\00\04\010\014\020\020\020\020\020\020\020\020\020\016\014\012\010\010\010\010\010\010\010\010\010\012\014\016\020\020\020\020\020\020\020\020\020\017\015\014\013\013\013\013\013\013\013\013\013\014\015\017\020\020\020\020\00\00\00\00\00\00\077" ##################### # set up the palette ##################### ports.inb(0x3DA) ports.writevec(0x3C0, 0x3C0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F) vgadefaultpalette() ###################### # for now, these must be called in 320x200x256 def vgaunchain(): ports.outb(4, 0x3CE) ports.outb(2, 0x3CF) # plane 2 ports.writevec(0x3C4, 0x3C5, 3, 1, 4, 0, 6) # unchained ports.outb(0x14, 0x3D4) ports.outb(0x00, 0x3D5)
def ready(): return (ports.inb(0x3FD) & 0x20)