def test_send_cmd_2sq_1cq(nvme0): # 2 SQ share one CQ cq = IOCQ(nvme0, 1, 10, PRP()) sq1 = IOSQ(nvme0, 1, 10, PRP(), cqid=1) sq2 = IOSQ(nvme0, 2, 16, PRP(), cqid=1) # write lba0, 16K data organized by PRPList write_cmd = SQE(1, 1) # write to namespace 1 write_cmd.prp1 = PRP() # PRP1 is a 4K page prp_list = PRPList() # PRPList contains 3 pages prp_list[0] = PRP() prp_list[1] = PRP() prp_list[2] = PRP() write_cmd.prp2 = prp_list # PRP2 points to the PRPList write_cmd[10] = 0 # starting LBA write_cmd[12] = 31 # LBA count: 32, 16K, 4 pages write_cmd.cid = 123 # verify cid later # send write commands in both SQ sq1[0] = write_cmd # fill command dwords in SQ1 write_cmd.cid = 567 # verify cid later sq2[0] = write_cmd # fill command dwords in SQ2 sq2.tail = 1 # ring doorbell of SQ2 first time.sleep(0.1) # delay to ring SQ1, sq1.tail = 1 # so command in SQ2 should complete first # wait for 2 command completions while CQE(cq[1]).p == 0: pass # check first cpl cqe = CQE(cq[0]) assert cqe.sqid == 2 assert cqe.sqhd == 1 assert cqe.cid == 567 # check second cpl cqe = CQE(cq[1]) assert cqe.sqid == 1 assert cqe.sqhd == 1 assert cqe.cid == 123 # update cq head doorbell to device cq.head = 2 # delete all queues sq1.delete() sq2.delete() cq.delete()
def test_pcie_link_control_aspm(nvme0, pcie, aspm): #1:0 linkctrl_addr = pcie.cap_offset(0x10) + 16 linkctrl = pcie.register(linkctrl_addr, 2) logging.info("link control register [0x%x]= 0x%x" % (linkctrl_addr, linkctrl)) # set ASPM control pcie[linkctrl_addr] = (linkctrl & 0xfc) | aspm linkctrl = pcie.register(linkctrl_addr, 2) logging.info("link control register [0x%x]= 0x%x" % (linkctrl_addr, linkctrl)) # IO queue for read commands cq = IOCQ(nvme0, 1, 16, PRP()) sq = IOSQ(nvme0, 1, 16, PRP(), cqid=1) # read lba 0 for 1000 times, interleaved with delays read_cmd = SQE(2, 1) read_cmd.prp1 = PRPList() pbit = 1 for i in range(1000): logging.debug(i) slot = i % 16 if slot == 0: pbit = not pbit next_slot = slot + 1 if next_slot == 16: next_slot = 0 sq[slot] = read_cmd sq.tail = next_slot while cq[slot].p == pbit: pass cq.head = next_slot # delay to trigger ASPM time.sleep(0.01) sq.delete() cq.delete() time.sleep(1)