def do_EMPTY(debug=False):
gates, ST_anti_12, ST_anti_12_close, ST_anti_12_tc_high_, _30, _30_load, _40, _31 = variables(
)
pulse = qc.Station.default.pulse
EMPTY = pulse.mk_segment()
if debug:
print(round(EMPTY.total_time.flat[0] / 1e3), 'us -- 31')
start, stop = ramp_through_anticorssing(['vP1', 'vP2'], [1, -1],
ST_anti_12_tc_high_, gates)
ramp(EMPTY, gates, 1e3, _31, start, debug=debug)
ramp(EMPTY, gates, 1e3, start, stop)
ramp(EMPTY, gates, 1e3, stop, _40)
if debug:
print(round(EMPTY.total_time.flat[0] / 1e3), 'us -- 40')
ramp(EMPTY, gates, 1e3, _40, _30_load)
ramp(EMPTY, gates, 1e3, _30_load, _30)
wait(EMPTY, gates, 1e3, _30)
if debug:
print(round(EMPTY.total_time.flat[0] / 1e3), 'us -- 30')
return EMPTY
def add(self, segment=None, **kwargs):
if segment is None and self._segment_generator is None:
raise ValueError('no segment privided')
if segment is None:
segment = self._segment_generator.generate_segment()
if len(kwargs) == 0:
self.kwargs['t_wait']= self.wait_time
else:
self.kwargs['t_wait'] = kwargs['t_wait']
wait(segment, **self.kwargs)
def do_READ(ramp=100, t_meas=2e3, scan_range=0, nth_readout=1, debug=False):
gates, ST_anti_12, ST_anti_12_close, ST_anti_12_tc_high_, _30, _30_load, _40, _31 = variables(
)
pulse = qc.Station.default.pulse
READ = pulse.mk_segment()
if debug:
wait(LOAD, gates, 100, _31, debug=debug)
PSB_read_multi(READ,
gates,
ramp,
t_meas,
_31,
ST_anti_12,
nth_readout,
disable_trigger=debug)
return READ
def do_LOAD(pulse_deep=False, debug=False):
gates, ST_anti_12, ST_anti_12_close, ST_anti_12_tc_high_, _30, _30_load, _40, _31 = variables(
)
pulse = qc.Station.default.pulse
LOAD = pulse.mk_segment()
if debug:
print(round(LOAD.total_time.flat[0] / 1e3), 'us -- 30')
start = list(_30_load)
stop = list(_30_load)
start[1] -= 0.5
stop[1] += 0.5
start = tuple(start)
stop = tuple(stop)
wait(LOAD, gates, 1e3, _30, debug=debug)
ramp(LOAD, gates, 2e3, _30, _30_load)
ramp(LOAD, gates, 5e3, start, stop)
ramp(LOAD, gates, 1e3, stop, _40)
if debug:
print(round(LOAD.total_time.flat[0] / 1e3), 'us -- 40')
start, stop = ramp_through_anticorssing(['vP1', 'vP2'], [-2, 2],
ST_anti_12_tc_high_, gates)
ramp(LOAD, gates, 1e3, _40, start)
ramp(LOAD, gates, 5e3, start, stop)
ramp(LOAD, gates, 2e3, stop, _31)
wait(LOAD, gates, 1e3, _31)
if debug:
print(round(LOAD.total_time.flat[0] / 1e3), 'us -- 31')
return LOAD
from pulse_templates.oper.operators import wait
pulse = get_demo_lib('six')
seg = pulse.mk_segment()
gates = ('vP4', )
base_level = (0, )
# seg.vP4 += 10
qubit = 'qubit4_MW'
t_drive = 1000
amp = 10
freq = 200e8
padding = 10
Q4_Pi2 = single_qubit_gate_spec(qubit,
freq,
t_drive,
amp,
AM_mod='flattop',
phase_corrections={'qubit2_MW': 0.23})
# # T2* measurement
single_qubit_gate_simple(seg, Q4_Pi2, reset=False)
wait(seg, gates, linspace(10, 100), base_level)
# shorthand syntax
Q4_Pi2.add(seg, reset=True)
wait(seg, gates, 80, base_level)
# shorthand syntax
Q4_Pi2.add(seg, reset=True, MW_power=200)
wait(seg, gates, 80, base_level)
Q4_Pi2.add(seg, reset=True)
plot_seg(seg)