def test_reset(self): m = MMU([(0, 16, True), (16, 16, False)]) m.blocks[0]['memory'][0] = 5 m.write(16, 10) m.reset() self.assertEqual(m.read(0), 5) self.assertEqual(m.read(16), 0)
def test_reset(self): m = MMU([(0, 16, True), (16, 16, False)]) m.blocks[0]['memory'][0] = 5 m.write(16, 10) m.reset() self.assertEqual(m.read(0), 5) self.assertEqual(m.read(16), 0)
def test_index_error(self): m = MMU([(0, 128)]) with self.assertRaises(IndexError): m.write(-1, 0) with self.assertRaises(IndexError): m.write(128, 0) with self.assertRaises(IndexError): m.read(-1) with self.assertRaises(IndexError): m.read(128)
def test_index_error(self): m = MMU([(0, 128)]) with self.assertRaises(IndexError): m.write(-1, 0) with self.assertRaises(IndexError): m.write(128, 0) with self.assertRaises(IndexError): m.read(-1) with self.assertRaises(IndexError): m.read(128)
def test_write_readonly(self): m = MMU([(0, 16, True), (16, 16), (32, 16, True)]) with self.assertRaises(ReadOnlyError): m.write(8, 1) m.write(20, 1) with self.assertRaises(ReadOnlyError): m.write(40, 1)
def test_write_readonly(self): m = MMU([(0, 16, True), (16, 16), (32, 16, True)]) with self.assertRaises(ReadOnlyError): m.write(8, 1) m.write(20, 1) with self.assertRaises(ReadOnlyError): m.write(40, 1)
def load_level(stage, prg_rom, chr_rom, sym_file, nes_palette): # Initialize the MMU / CPU mmu = MMU([(0x0, _WORKING_RAM_SIZE, False, []), (0x8000, 0x10000, True, list(prg_rom))]) cpu = CPU(mmu, 0x0) # Execute some preamble subroutines which set up variables used by the main subroutines. if isinstance(stage, tuple): world_num, area_num = stage mmu.write(sym_file['WORLDNUMBER'], world_num - 1) mmu.write(sym_file['AREANUMBER'], area_num - 1) _execute_subroutine(cpu, sym_file['LOADAREAPOINTER']) else: area_pointer = stage mmu.write(sym_file['AREAPOINTER'], area_pointer) mmu.write(sym_file['HALFWAYPAGE'], 0) mmu.write(sym_file['ALTENTRANCECONTROL'], 0) mmu.write(sym_file['PRIMARYHARDMODE'], 0) mmu.write(sym_file['OPERMODE_TASK'], 0) _execute_subroutine(cpu, sym_file['INITIALIZEAREA']) # Extract the palette. palette = _load_palette(mmu, sym_file, nes_palette) # Repeatedly extract meta-tile columns, until the level starts repeating. cols = [] for column_pos in range(1000): _execute_subroutine(cpu, sym_file['AREAPARSERCORE']) cols.append(_get_metatile_buffer(mmu, sym_file)) _execute_subroutine(cpu, sym_file['INCREMENTCOLUMNPOS']) if len(cols) >= 96 and cols[-48:] == cols[-96:-48]: cols = cols[:-80] break level = np.array(cols).T # Render a dict of metatiles. mtiles = { mtile: _render_metatile(mmu, chr_rom, mtile, palette) for mtile in set(level.flatten()) } return level, mtiles
def test_read(self): m = MMU([(0, 128)]) m.write(16, 5) m.write(64, 111) self.assertEqual(5, m.read(16)) self.assertEqual(111, m.read(64))
def test_write_multiple_blocks(self): m = MMU([(0, 128), (1024, 128)]) m.write(16, 25) self.assertEqual(m.blocks[0]['memory'][16], 25) m.write(1056, 55) self.assertEqual(m.blocks[1]['memory'][32], 55, m.blocks[1]['memory'])
def test_write(self): m = MMU([(0, 128)]) m.write(16, 25) self.assertEqual(m.blocks[0]['memory'][16], 25)
def test_read(self): m = MMU([(0, 128)]) m.write(16, 5) m.write(64, 111) self.assertEqual(5, m.read(16)) self.assertEqual(111, m.read(64))
def test_write_multiple_blocks(self): m = MMU([(0, 128), (1024, 128)]) m.write(16, 25) self.assertEqual(m.blocks[0]['memory'][16], 25) m.write(1056, 55) self.assertEqual(m.blocks[1]['memory'][32], 55, m.blocks[1]['memory'])
def test_write(self): m = MMU([(0, 128)]) m.write(16, 25) self.assertEqual(m.blocks[0]['memory'][16], 25)