def execute_ldrsh(s, inst):
if condition_passed(s, inst.cond):
if inst.rd == 15: raise FatalError('UNPREDICTABLE')
addr = addressing_mode_3(s, inst)
# TODO: support multiple memory accessing modes?
# MemoryAccess( s.B, s.E )
# TODO: alignment fault checking?
# if (CP15_reg1_Ubit == 0) and address[0] == 0b1:
# UNPREDICTABLE
s.rf[inst.rd] = sext_16(s.mem.read(addr, 2))
s.rf[PC] = s.fetch_pc() + 4
def execute_ldrsh( s, inst ):
if condition_passed( s, inst.cond ):
if inst.rd == 15: raise FatalError('UNPREDICTABLE')
addr = addressing_mode_3( s, inst )
# TODO: support multiple memory accessing modes?
# MemoryAccess( s.B, s.E )
# TODO: alignment fault checking?
# if (CP15_reg1_Ubit == 0) and address[0] == 0b1:
# UNPREDICTABLE
s.rf[ inst.rd ] = sext_16( s.mem.read( addr, 2 ) )
s.rf[PC] = s.fetch_pc() + 4
def execute_sb( s, inst ): addr = trim_32( s.rf[inst.rs] + sext_16(inst.imm) ) s.mem.write( addr, 1, s.rf[inst.rt] ) s.pc += 4
def execute_lbu( s, inst ): addr = trim_32( s.rf[inst.rs] + sext_16(inst.imm) ) s.rf[inst.rt] = s.mem.read( addr, 1 ) s.pc += 4
def execute_bgez( s, inst ):
if signed( s.rf[inst.rs] ) >= 0:
s.pc = trim_32( signed(s.pc) + 4 + signed(sext_16(inst.imm) << 2) )
else:
s.pc += 4
def execute_bne( s, inst ):
if s.rf[inst.rs] != s.rf[inst.rt]:
s.pc = trim_32( signed(s.pc) + 4 + signed(sext_16(inst.imm) << 2) )
else:
s.pc += 4
def execute_sltiu( s, inst ): s.rf[inst.rt] = s.rf[inst.rs] < sext_16(inst.imm) s.pc += 4
def execute_slti( s, inst ): s.rf[inst.rt] = signed( s.rf[inst.rs] ) < signed( sext_16(inst.imm) ) s.pc += 4
def execute_addiu( s, inst ): s.rf[ inst.rt ] = trim_32( s.rf[ inst.rs ] + sext_16( inst.imm ) ) s.pc += 4
def execute_bgez( s, inst ):
if signed( s.rf[inst.rs] ) >= 0:
s.pc = s.pc + 4 + (signed(sext_16(inst.imm)) << 2)
else:
s.pc += 4
def execute_bne( s, inst ):
if s.rf[inst.rs] != s.rf[inst.rt]:
s.pc = s.pc + 4 + (signed(sext_16(inst.imm)) << 2)
else:
s.pc += 4
