class JtagTestCase(unittest.TestCase):
def setUp(self):
url = environ.get('FTDI_DEVICE', 'ftdi://ftdi:2232h/1')
self.jtag = JtagEngine(trst=True, frequency=3E6)
self.jtag.configure(url)
self.jtag.reset()
self.tool = JtagTool(self.jtag)
def tearDown(self):
del self.jtag
def test_idcode_reset(self):
"""Read the IDCODE right after a JTAG reset"""
self.jtag.reset()
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print("IDCODE (reset): 0x%x" % int(idcode))
def test_idcode_sequence(self):
"""Read the IDCODE using the dedicated instruction"""
instruction = JTAG_INSTR['IDCODE']
self.jtag.write_ir(instruction)
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print("IDCODE (idcode): 0x%08x" % int(idcode))
def _test_detect_ir_length(self):
"""Detect the instruction register length"""
self.jtag.go_idle()
self.jtag.capture_ir()
self.tool.detect_register_size()
class JtagTestCase(unittest.TestCase):
def setUp(self):
self.jtag = JtagEngine(trst=True, frequency=3E6)
self.jtag.configure(vendor=0x403, product=0x6011, interface=1)
self.jtag.reset()
self.tool = JtagTool(self.jtag)
def tearDown(self):
del self.jtag
def test_idcode_reset(self):
"""Read the IDCODE right after a JTAG reset"""
self.jtag.reset()
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print "IDCODE (reset): 0x%x" % int(idcode)
def test_idcode_sequence(self):
"""Read the IDCODE using the dedicated instruction"""
instruction = JTAG_INSTR['IDCODE']
self.jtag.write_ir(instruction)
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print "IDCODE (idcode): 0x%08x" % int(idcode)
def _test_detect_ir_length(self):
"""Detect the instruction register length"""
self.jtag.go_idle()
self.jtag.capture_ir()
self.tool.detect_register_size()
class JtagTestCase(unittest.TestCase):
def setUp(self):
self.jtag = JtagEngine(trst=True, frequency=3E6)
self.jtag.configure(vendor=0x403, product=0x6011, interface=1)
self.jtag.reset()
self.tool = JtagTool(self.jtag)
def tearDown(self):
del self.jtag
def test_idcode_reset(self):
"""Read the IDCODE right after a JTAG reset"""
self.jtag.reset()
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print_("IDCODE (reset): 0x%x" % int(idcode))
def test_idcode_sequence(self):
"""Read the IDCODE using the dedicated instruction"""
instruction = JTAG_INSTR['IDCODE']
self.jtag.write_ir(instruction)
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print_("IDCODE (idcode): 0x%08x" % int(idcode))
def _test_detect_ir_length(self):
"""Detect the instruction register length"""
self.jtag.go_idle()
self.jtag.capture_ir()
self.tool.detect_register_size()
class JtagTestCase(TestCase):
def setUp(self):
url = environ.get('FTDI_DEVICE', 'ftdi://ftdi:2232h/1')
self.jtag = JtagEngine(trst=True, frequency=3E6)
self.jtag.configure(url)
self.jtag.reset()
self.tool = JtagTool(self.jtag)
def tearDown(self):
del self.jtag
def test_idcode_reset(self):
"""Read the IDCODE right after a JTAG reset"""
self.jtag.reset()
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print("IDCODE (reset): 0x%x" % int(idcode))
def test_idcode_sequence(self):
"""Read the IDCODE using the dedicated instruction"""
instruction = JTAG_INSTR['IDCODE']
self.jtag.write_ir(instruction)
idcode = self.jtag.read_dr(32)
self.jtag.go_idle()
print("IDCODE (idcode): 0x%08x" % int(idcode))
def test_idcode_shift_register(self):
"""Read the IDCODE using the dedicated instruction with
shift_and_update_register"""
instruction = JTAG_INSTR['IDCODE']
self.jtag.change_state('shift_ir')
retval = self.jtag.shift_and_update_register(instruction)
print("retval: 0x%x" % int(retval))
self.jtag.go_idle()
self.jtag.change_state('shift_dr')
idcode = self.jtag.shift_and_update_register(BitSequence('0' * 32))
self.jtag.go_idle()
print("IDCODE (idcode): 0x%08x" % int(idcode))
def test_bypass_shift_register(self):
"""Test the BYPASS instruction using shift_and_update_register"""
instruction = JTAG_INSTR['BYPASS']
self.jtag.change_state('shift_ir')
retval = self.jtag.shift_and_update_register(instruction)
print("retval: 0x%x" % int(retval))
self.jtag.go_idle()
self.jtag.change_state('shift_dr')
_in = BitSequence('011011110000' * 2, length=24)
out = self.jtag.shift_and_update_register(_in)
self.jtag.go_idle()
print(
"BYPASS sent: %s, received: %s (should be left shifted by one)" %
(_in, out))
def _test_detect_ir_length(self):
"""Detect the instruction register length"""
self.jtag.go_idle()
self.jtag.capture_ir()
self.tool.detect_register_size()
engine.configure('ftdi://olimex:ft2232h/1')
elif (argv[1] == 's'):
ctrl = JtagSimController()
ctrl.configure(7894)
engine = JtagOCDEngine(ctrl)
elif (argv[1] == 'v'):
ctrl = Blaster()
engine = JtagOCDEngine(ctrl)
tool = JtagTool(engine)
time.sleep(1)
engine.reset()
id = tool.idcode()
print("ID:%08x" % id)
engine.go_idle()
engine.capture_ir()
arch = archmap.get(argv[2], archmap['murax'])
if argv[1] != 'v':
irlen = tool.detect_register_size()
else:
irlen = arch.irsize
ocd = arch.Ocd(engine, irlen)
memadr = arch.membaseadr
ocd.resetdm()
ocd.halt()
ocd.writereg(5, 0x12345678)
time.sleep(3)
ocd.writereg(4, 0x87654321)
time.sleep(3)
val = ocd.readreg(5)
print("REG5:%08x" % val)
