def test_directed_two_inputs(cosim_cls):
verif(drv(t=T_DIN_SEP, seq=[list(range(9)), list(range(5))]),
drv(t=T_CFG, seq=[2, 3]),
f=take(sim_cls=cosim_cls),
ref=take(name='ref_model'))
sim()
def test_q_directed_two_inputs(sim_cls, din_delay, cfg_delay):
seq1 = [list(range(3)) for _ in range(9)]
seq2 = [list(range(6)) for _ in range(5)]
seq = [seq1, seq2]
directed(drv(t=T_QDIN_SEP, seq=seq) | delay_rng(din_delay, din_delay),
drv(t=T_CFG, seq=[2, 3]) | delay_rng(cfg_delay, cfg_delay),
f=take(sim_cls=sim_cls),
ref=[[list(range(3))] * 2, [list(range(6))] * 3])
sim()
def test_qtake_formal():
take(Intf(T_QDIN))
def test_take_formal():
take(Intf(T_DIN))
def test_take_yosys():
take(Intf(T_DIN))
def test_take_vivado():
take(Intf(T_DIN))
from pygears.lib import take, check, drv
from pygears.typing import Uint, Queue
size = drv(t=Uint[2], seq=[2, 3])
drv(t=Queue[Uint[4]], seq=[[1, 2, 3, 4], [1, 2, 3, 4]]) \
| take(size=size) \
| check(ref=[[1, 2], [1, 2, 3]])