def post_send(self):
"""
Posts one send WQE to the SQ by doing all the required work such as
building the control/data segments, updating and ringing the dbr,
updating the producer indexes, etc.
"""
idx = self.qattr.sq.post_idx if self.qattr.sq.post_idx < self.qattr.sq.wqe_num else 0
buf_offset = self.qattr.sq.offset + (idx << dve.MLX5_SEND_WQE_SHIFT)
# Prepare WQE
imm_be32 = struct.unpack(
"<I", struct.pack(">I", self.imm + self.qattr.sq.post_idx))[0]
ctrl_seg = WqeCtrlSeg(imm=imm_be32,
fm_ce_se=dve.MLX5_WQE_CTRL_CQ_UPDATE)
data_seg = WqeDataSeg(self.mr.length, self.mr.lkey, self.mr.buf)
ctrl_seg.opmod_idx_opcode = (self.qattr.sq.post_idx
& 0xffff) << 8 | dve.MLX5_OPCODE_SEND_IMM
size_in_octowords = int((ctrl_seg.sizeof() + data_seg.sizeof()) / 16)
ctrl_seg.qpn_ds = self.qpn << 8 | size_in_octowords
Wqe([ctrl_seg, data_seg], self.umems['qp'].umem_addr + buf_offset)
self.qattr.sq.post_idx += int(
(size_in_octowords * 16 + dve.MLX5_SEND_WQE_BB - 1) /
dve.MLX5_SEND_WQE_BB)
# Make sure descriptors are written
dma.udma_to_dev_barrier()
# Update the doorbell record
mem.writebe32(self.umems['qp_dbr'].umem_addr,
self.qattr.sq.post_idx & 0xffff, dve.MLX5_SND_DBR)
dma.udma_to_dev_barrier()
# Ring the doorbell and post the WQE
dma.mmio_write64_as_be(self.uar['qp'].reg_addr,
mem.read64(ctrl_seg.addr))
def update_ci(self, cc, arm=0):
addr = self.doorbell
if arm:
addr += 8 # Adding 2 bytes according to PRM
self.cons_index += cc
val = (self.cons_index & 0xffffff) | (self.eqn << 24)
val_be = struct.unpack("<I", struct.pack(">I", val))[0]
dma.mmio_write32_as_be(addr, val_be)
dma.udma_to_dev_barrier()
def post_recv(self):
"""
Posts one receive WQE to the RQ by doing all the required work such as
building the control/data segments, updating the dbr and the producer
indexes.
"""
buf_offset = self.qattr.rq.offset + self.qattr.rq.wqe_size * self.qattr.rq.head
# Prepare WQE
data_seg = WqeDataSeg(self.mr.length, self.mr.lkey, self.mr.buf)
Wqe([data_seg], self.umems['qp'].umem_addr + buf_offset)
# Update indexes
self.qattr.rq.post_idx += 1
self.qattr.rq.head = self.qattr.rq.head + 1 if self.qattr.rq.head + 1 < self.qattr.rq.wqe_num else 0
# Update the doorbell record
dma.udma_to_dev_barrier()
mem.writebe32(self.umems['qp_dbr'].umem_addr,
self.qattr.rq.post_idx & 0xffff, dve.MLX5_RCV_DBR)