def test1(dut):
random.seed(0)
uut = dut.uut
cocotb.fork(simulationSpeedPrinter(uut.io_axiClk))
yield loadIHex(uut,"../hex/vga.hex",uut.io_axiClk,uut.io_asyncReset)
pinsecClockGen(dut)
yield assertions(uut)
def test1(dut):
random.seed(0)
uut = dut.uut
cocotb.fork(simulationSpeedPrinter(uut.io_axiClk))
yield loadIHex(uut,"../hex/vga.hex",uut.io_axiClk,uut.io_asyncReset)
pinsecClockGen(dut)
yield assertions(uut)
def test1(dut):
dut.log.info("Cocotb test boot")
random.seed(0)
cocotb.fork(simulationSpeedPrinter(dut.io_axiClk))
yield loadIHex(dut, "../hex/timer.hex", dut.io_axiClk, dut.io_asyncReset)
cocotb.fork(ClockDomainAsyncReset(dut.io_axiClk, dut.io_asyncReset))
yield assertions(dut)
yield Timer(1000 * 10)
dut.log.info("Cocotb test done")
def test1(dut):
random.seed(0)
from cocotblib.misc import cocotbXHack
cocotbXHack()
uut = dut.uut
cocotb.fork(simulationSpeedPrinter(uut.io_axiClk))
yield loadIHex(dut,"../hex/uart.hex",uut.io_axiClk,uut.io_asyncReset)
pinsecClockGen(dut)
cocotb.fork(txToRxBypass(uut))
yield assertions(uut)
def test1(dut):
random.seed(0)
uut = dut.uut
log = open('uartTx.log', 'w')
cocotb.fork(simulationSpeedPrinter(uut.io_axiClk))
yield loadIHex(dut,"../hex/dhrystone.hex",uut.io_axiClk,uut.io_asyncReset)
pinsecClockGen(dut)
cocotb.fork(uartTxBypass(uut.axi_uartCtrl.uartCtrl,uut.io_axiClk,log))
yield assertions(uut,log)
yield Timer(1000*10)
def jtagTest(dut):
from cocotblib.misc import cocotbXHack
cocotbXHack()
uut = dut.uut
log = open('uartTx.log', 'w')
cocotb.fork(simulationSpeedPrinter(uut.io_axiClk))
yield loadIHex(dut,"../hex/dummy.hex",uut.io_axiClk,uut.io_asyncReset)
pinsecClockGen(dut)
yield Timer(1000*10)
jtag = JtagMaster(Bundle(uut,"io_jtag"),20000*4,4)
yield Timer(1000*50)
yield jtag.goToIdle()
yield Timer(1000*8)
#yield jtagBridgeWrite(jtag,0xF00F0200,0x00030000,4)
#yield Timer(1000*80)
# Check rom write/read via jtag
yield jtagBridgeWrite(jtag,8,0x11223344,4)
yield jtagBridgeWrite(jtag,10,0x00550000,1)
yield jtagBridgeReadAssert(jtag,8,4,0x11553344)
yield jtagBridgeReadAssert(jtag,10,2,0x1155)
yield jtagBridgeWrite(jtag,0x40004FF0,0x77665544,4)
yield Timer(1000*50)
yield jtagBridgeReadAssert(jtag,0x40004FF0,4,0x77665544)
yield jtagBridgeWrite(jtag,0x40004FF2,0x00FF0000,1)
yield Timer(1000*50)
yield jtagBridgeReadAssert(jtag,0x40004FF0,4,0x77FF5544)
# Check RISCV APB debug module via jtag
yield jtagBridgeWrite(jtag,0xF00F0200,1 << 17,4) #halt CPU
yield jtagBridgeReadAssert(jtag,0xF00F0200,4,(1 << 1),0x0F)
yield jtagBridgeWrite(jtag,0xF00F0008,0x99887766,4) #write R2
yield jtagBridgeReadAssert(jtag,0xF00F0008,4,0x99887766)
yield jtagBridgeReadAssert(jtag,0xF00F0000+10*4,4,0x55) #Written by dummy.hex
yield Timer(1000*500)
def test1(dut):
from cocotblib.misc import cocotbXHack
cocotbXHack()
random.seed(0)
uut = dut.uut
log = open('uartTx.log', 'w')
cocotb.fork(simulationSpeedPrinter(uut.io_axiClk))
yield loadIHex(dut, "../hex/dhrystone.hex", uut.io_axiClk,
uut.io_asyncReset)
pinsecClockGen(dut)
cocotb.fork(uartTxBypass(uut.axi_uartCtrl.uartCtrl, uut.io_axiClk, log))
yield assertions(uut, log)
yield Timer(1000 * 10)
def jtagTest(dut):
from cocotblib.misc import cocotbXHack
cocotbXHack()
uut = dut.uut
log = open('uartTx.log', 'w')
cocotb.fork(simulationSpeedPrinter(uut.io_axiClk))
yield loadIHex(dut, "../hex/dummy.hex", uut.io_axiClk, uut.io_asyncReset)
pinsecClockGen(dut)
yield Timer(1000 * 10)
jtag = JtagMaster(Bundle(uut, "io_jtag"), 20000 * 4, 4)
yield Timer(1000 * 50)
yield jtag.goToIdle()
yield Timer(1000 * 8)
#yield jtagBridgeWrite(jtag,0xF00F0200,0x00030000,4)
#yield Timer(1000*80)
# Check rom write/read via jtag
yield jtagBridgeWrite(jtag, 8, 0x11223344, 4)
yield jtagBridgeWrite(jtag, 10, 0x00550000, 1)
yield jtagBridgeReadAssert(jtag, 8, 4, 0x11553344)
yield jtagBridgeReadAssert(jtag, 10, 2, 0x1155)
yield jtagBridgeWrite(jtag, 0x40004FF0, 0x77665544, 4)
yield Timer(1000 * 50)
yield jtagBridgeReadAssert(jtag, 0x40004FF0, 4, 0x77665544)
yield jtagBridgeWrite(jtag, 0x40004FF2, 0x00FF0000, 1)
yield Timer(1000 * 50)
yield jtagBridgeReadAssert(jtag, 0x40004FF0, 4, 0x77FF5544)
# Check RISCV APB debug module via jtag
yield jtagBridgeWrite(jtag, 0xF00F0200, 1 << 17, 4) #halt CPU
yield jtagBridgeReadAssert(jtag, 0xF00F0200, 4, (1 << 1), 0x0F)
yield jtagBridgeWrite(jtag, 0xF00F0008, 0x99887766, 4) #write R2
yield jtagBridgeReadAssert(jtag, 0xF00F0008, 4, 0x99887766)
yield jtagBridgeReadAssert(jtag, 0xF00F0000 + 10 * 4, 4,
0x55) #Written by dummy.hex
yield Timer(1000 * 500)