def ADC(addend): # ADd with Carry # Write to register A RegA.write_register(addend) # Activate Adder Output ALU.unset_all() ALU.set_ADD(1) # Read result C_OUT = ALU.read_C_OUT() RegADD.clock_data() SUM = RegADD.read_register() # Store result in Accumulator LDA(SUM) return(C_OUT)
RegADD.clock_data() result = RegADD.read_register() + (ALU.read_C_OUT() << 8) print(numA, " +", numB, " = ", result) if result != (numA + numB): print("NumA: ", numA) print("Numb: ", numB) print("NumA: ", result) break numB += 1 time.sleep(delayTime) while True: ALU.unset_all() ALU.set_ADD(1) counter_test() # while True: # ALU.set_C_IN(1) # print("Carry Out: ", ALU.read_C_OUT()) # time.sleep(delayTime) # ALU.set_C_IN(0) # print("Carry Out: ", ALU.read_C_OUT()) # time.sleep(delayTime) break