def write(self):
word_start = 4 * bits2int(self.mar.old_write_val, wordSize=32)
self.array[word_start + 0] = bits2int(self.mdr.old_val[0:8],
wordSize=8)
self.array[word_start + 1] = bits2int(self.mdr.old_val[8:16],
wordSize=8)
self.array[word_start + 2] = bits2int(self.mdr.old_val[16:24],
wordSize=8)
self.array[word_start + 3] = bits2int(self.mdr.old_val[24:32],
wordSize=8)
def test_operations(intA, intB):
from util import bits2int, int2bits
from register import Register
from bus import Bus
A = Bus("A", 32)
B = Bus("B", 32)
C = Bus("C", 32)
mir = Register("MIR", 36, None, None, None)
alu = ALU(A, B, C, mir)
wordSize = max(intA.bit_length(), intB.bit_length())
A.val = int2bits(intA, wordSize)
B.val = int2bits(intB, wordSize)
print("A = binary({0}) -> {1}".format(intA, list(reversed(A.val))))
print("B = binary({0}) -> {1}".format(intB, list(reversed(B.val))))
print()
for _, op in operations.items():
mir.val = [0 for _ in range(16)
] + op.bit_string + [0 for _ in range(16 + 6, 36)]
alu.tick()
sol = C.val
print("f(A,B) = {0}".format(op.name))
print("binary({0}) -> {1}".format(bits2int(sol),
list(reversed(sol))))
print()
def read(self):
word_start = 4 * bits2int(self.mar.old_read_val, wordSize=32)
word = self.array[word_start:word_start + 4]
self.mdr.val = int2bits(word[0], wordSize=8) + \
int2bits(word[1], wordSize=8) + \
int2bits(word[2], wordSize=8) + \
int2bits(word[3], wordSize=8)
def tick(self, verbose=True):
if verbose:
print("SP\t", bits2int(self.registers["SP"].val, wordSize=32), end='\t->\t')
print("RAM[4*SP]\t",self.ram.array[4*bits2int(ijvm.registers["SP"].val, wordSize=32)])
print("LV\t", bits2int(self.registers["LV"].val, wordSize=32), end='\t->\t')
print("RAM[4*LV]\t", self.ram.array[4*bits2int(ijvm.registers["LV"].val, wordSize=32)])
print("MAR\t", bits2int(self.registers["MAR"].val, wordSize=32), end='\t->\t')
print("RAM[4*MAR]\t", self.ram.array[4*bits2int(self.registers["MAR"].val, wordSize=32)])
print("PC\t", bits2int(self.registers["PC"].val, wordSize=32), end='\t->\t')
print("RAM[PC]\t\t",self.ram.array[bits2int(self.registers["PC"].val, wordSize=32)])
print("MDR\t", bits2int(self.registers["MDR"].val, wordSize=32))
print("TOS\t", bits2int(self.registers["TOS"].val, wordSize=32))
print("MBR\t", bits2int(self.registers["MBR"].val, wordSize=8))
print("OPC\t", bits2int(self.registers["OPC"].val, wordSize=32))
print("H\t", bits2int(self.registers["H"].val, wordSize=32))
print("Z-flag\t", self.alu.Z)
print("N-flag\t", self.alu.N)
print()
if verbose:
current_micro_instruction, mal = self.control.get_micro_instruction_name()
print("Current microinstruction is\t\t{0}".format(current_micro_instruction))
print("MAL for this microinstruction is\t{0}".format(mal))
for reg in self.registers.values():
reg.set_write_pin()
reg.write_to_bus()
if verbose and reg.write and reg.name != "H":
print("Wrote from register\t\t\t{0} to {1}-bus".format(reg.name, reg.write_bus.name))
# need to set read pins so they dont get overwriten by a new value in MIR
reg.set_read_pin()
self.alu.tick()
if verbose:
print("ALU performed \t\t\t\tf = {0}".format(self.alu.get_last_instruction_name()))
for reg in self.registers.values():
reg.read_from_bus()
if verbose and reg.read:
print("Wrote from \t\t\t\t{1}-bus to {0}".format(reg.name, reg.read_bus.name))
self.ram.tick()
if verbose and len(self.ram.todo) != 0:
for op in self.ram.todo:
print("Sent {0} to RAM".format(op.__name__))
self.control.tick()
if verbose:
print("Loaded new\t\t\t\taddress {0} into MPC".format(self.control.get_address()))
if verbose:
print()
# set program counter and memory byte register to first instruction
# this has to be present before the program starts
ijvm.registers["PC"].val = int2bits(prog_start_index, wordSize=32)
ijvm.registers["MBR"].val = int2bits(ijvm.ram.array[prog_start_index], wordSize=8)
# set stack pointer to an empty location, (multiple of 4)
ijvm.registers["SP"].val = int2bits(4*((prog_start_index + len(machine_code))//4 + 1), wordSize=32)
verbose = False
debug = False
try:
while True:
ijvm.tick(verbose or debug)
if debug:
input()
except KeyError as e:
if verbose or debug:
print()
if e.args[0] == 0xFF or e.args[0] == 0x1FF:
# this is the end of the program
# final output is in top of stack
print("OUTPUT", bits2int(ijvm.registers["TOS"].val, wordSize=32))
else:
# something wrong happened
# probably a GOTO jumping to data instead of an instruction
print("ERROR")
print("Tried to jump to microinstruction {0}, but there is no such microinstruction".format(e))
def decode_B_field():
x = bits2int(self.val[:4], wordSize=4)
return [1 if x == i else 0 for i in range(9)]
def get_last_instruction_name(self):
x = bits2int(self.mir.val[16:22], wordSize=6)
if x in operations:
return operations[x].name
else:
return "UNKNOWN"
def fetch(self):
self.mbr.val = int2bits(self.array[bits2int(self.pc.old_val,
wordSize=32)],
wordSize=8)
def get_address(self):
return bits2int(self.mpc, wordSize=9)
def write_to_inst(ins, bits):
try:
ins.write_register(320, util.bits2int(bits[::-1]))
return True
except OSError:
return False