def execAnd_sr64(binary): inst = 'AND ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) inst += 'x' + str(rdKey) + ', x' + str(rnKey) + ', x' + str(rmKey) + ', ' rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0') immKey = binary[16:22] immvalue = int(immKey, 2) # amount rmValue = utilFunc.getRegValueByStringkey(binary[11:16], '0') shifttype = binary[8:10] temp = '' if shifttype == "00": temp = utilFunc.lsl(rmValue[0:64], immvalue) inst += 'LSL' elif shifttype == "01": temp = utilFunc.lsr(rmValue[0:64], immvalue) inst += 'LSR' elif shifttype == "10": temp = utilFunc.asr(rmValue[0:64], immvalue) inst += 'ASR' else: temp = utilFunc.ror(rmValue[0:64], immvalue) inst += 'ROR' inst += ' #' + str(immvalue) to_store = utilFunc.logical_and(temp, rnValue[0:64]).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, to_store, inst, '0')
def execAsr_i64(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) if(imms == '111111'): shiftVal = int(immr,2) instr = 'ASR x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str(shiftVal) rd = utilFunc.asr(rnVal, shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def execAsr_i32(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) if(imms == '011111'): shiftVal = int(immr,2) instr = 'ASR w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str(shiftVal) rd = '0' * 32 + utilFunc.asr(rnVal[32:64], shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def helper_l(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) imm19 = binary[8:27] opc = binary[0:2] signed = False if (opc == '00'): size = 4 elif (opc == '01'): size = 8 elif (opc == '10'): size = 4 signed = True offset = utilFunc.signExtend(imm19 + '00', 64) offset = utilFunc.sInt(offset, 64) address = armdebug.getPC() + offset dataSize = size * 8 data = utilFunc.fetchFromMemory(address, dataSize) if (data == const.TRAP): utilFunc.finalize_simple(instr) print "HEY!!! There seems to be a problem - memory location can not be accessed" print "Moving ahead without executing the instruction" return if (signed): data = utilFunc.signExtend(data, 64) instr += str(rtKey) + ", #" + str(offset) utilFunc.finalize(rtKey, data.zfill(64), instr, '0')
def op_er(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) option = binary[16:19] imm3 = binary[19:22] shift = int(imm3, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if(N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif(N == 64): r = 'x' if(option[1:3] == '11'): rmToPrint = 'x' else: rmToPrint = 'w' instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", " + rmToPrint + str(rmkey) + ", " op2, instr = utilFunc.extendReg(rmVal, shift, option, instr, N) instr += " #" + str(shift) to_store, isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def op_er(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) option = binary[16:19] imm3 = binary[19:22] shift = int(imm3, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if (N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif (N == 64): r = 'x' if (option[1:3] == '11'): rmToPrint = 'x' else: rmToPrint = 'w' instr += " " + r + str(rdKey) + ", " + r + str( rnKey) + ", " + rmToPrint + str(rmkey) + ", " op2, instr = utilFunc.extendReg(rmVal, shift, option, instr, N) instr += " #" + str(shift) to_store, isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def helper_l(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) imm19 = binary[8:27] opc = binary[0:2] signed = False if(opc == '00'): size = 4 elif(opc == '01'): size = 8 elif(opc == '10'): size = 4 signed = True offset = utilFunc.signExtend(imm19 + '00', 64) offset = utilFunc.sInt(offset, 64) address = armdebug.getPC() + offset dataSize = size * 8 data = utilFunc.fetchFromMemory(address, dataSize) if(data == const.TRAP): utilFunc.finalize_simple(instr) print "HEY!!! There seems to be a problem - memory location can not be accessed" print "Moving ahead without executing the instruction" return if(signed): data = utilFunc.signExtend(data, 64) instr += str(rtKey) + ", #" + str(offset) utilFunc.finalize(rtKey, data.zfill(64), instr, '0')
def execAsr_i64(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) if (imms == '111111'): shiftVal = int(immr, 2) instr = 'ASR x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str( shiftVal) rd = utilFunc.asr(rnVal, shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def execAsr_i32(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) if (imms == '011111'): shiftVal = int(immr, 2) instr = 'ASR w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str( shiftVal) rd = '0' * 32 + utilFunc.asr(rnVal[32:64], shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def mov_reg(binary, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) rmVal = utilFunc.getRegValueByStringkey(binary[11:16], "0") if N == 32: rmVal = rmVal[32:64] r = "w" elif N == 64: r = "x" instr = "MOV " + r + str(rdKey) + ", " + r + str(rmKey) utilFunc.finalize(rdKey, rmVal.zfill(const.REG_SIZE), instr, "0")
def mov_imm(binary, instr, inverted, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) hw = binary[9:11] pos = utilFunc.uInt(hw + "0000") imm16 = binary[11:27] result = (imm16 + "0" * pos).zfill(N) if inverted == "1": result = utilFunc.negate(result) instr = instr + str(rdKey) + ", #" + utilFunc.binaryToHexStr(result) utilFunc.finalize(rdKey, result.zfill(const.REG_SIZE), instr, "0")
def mov_reg(binary, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if (N == 32): rmVal = rmVal[32:64] r = 'w' elif (N == 64): r = 'x' instr = "MOV " + r + str(rdKey) + ", " + r + str(rmKey) utilFunc.finalize(rdKey, rmVal.zfill(const.REG_SIZE), instr, '0')
def mov_imm(binary, instr, inverted, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) hw = binary[9:11] pos = utilFunc.uInt(hw + '0000') imm16 = binary[11:27] result = (imm16 + '0' * pos).zfill(N) if (inverted == '1'): result = utilFunc.negate(result) instr = instr + str(rdKey) + ", #" + utilFunc.binaryToHexStr(result) utilFunc.finalize(rdKey, result.zfill(const.REG_SIZE), instr, '0')
def execLslLsr_i32(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) immrVal = int(immr,2) immsVal = int(imms,2) if(imms == '011111'): #LSR shiftVal = immrVal instr = 'LSR w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str(shiftVal) rd = '0' * 32 + utilFunc.lsr(rnVal[32:64], shiftVal) elif(immrVal == immsVal+1): #LSL shiftVal = 63-immsVal instr = 'LSL w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str(shiftVal) rd = '0' * 32 + utilFunc.lsl(rnVal[32:64], shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def execLslLsr_i64(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) immrVal = int(immr,2) immsVal = int(imms,2) if(imms == '111111'): #LSR shiftVal = immrVal instr = 'LSR x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str(shiftVal) rd = utilFunc.lsr(rnVal, shiftVal) elif(immrVal == immsVal+1): #LSL shiftVal = 63-immsVal instr = 'LSL x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str(shiftVal) rd = utilFunc.lsl(rnVal, shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def execLslLsr_i32(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) immrVal = int(immr, 2) immsVal = int(imms, 2) if (imms == '011111'): #LSR shiftVal = immrVal instr = 'LSR w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str( shiftVal) rd = '0' * 32 + utilFunc.lsr(rnVal[32:64], shiftVal) elif (immrVal == immsVal + 1): #LSL shiftVal = 63 - immsVal instr = 'LSL w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str( shiftVal) rd = '0' * 32 + utilFunc.lsl(rnVal[32:64], shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def mov_bmi(binary, N): inst = "MOV " rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) if N == 32: r = "w" else: r = "x" inst += r + str(rdKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ", #" + utilFunc.binaryToHexStr(imm) result = utilFunc.logical_or("0" * N, imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, "1")
def execLslLsr_i64(binary): rdKey, rnKey, rnVal, immr, imms = getFields_i(binary) immrVal = int(immr, 2) immsVal = int(imms, 2) if (imms == '111111'): #LSR shiftVal = immrVal instr = 'LSR x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str( shiftVal) rd = utilFunc.lsr(rnVal, shiftVal) elif (immrVal == immsVal + 1): #LSL shiftVal = 63 - immsVal instr = 'LSL x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str( shiftVal) rd = utilFunc.lsl(rnVal, shiftVal) utilFunc.finalize(rdKey, rd, instr, '0')
def mov_bmi(binary, N): inst = 'MOV ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) if (N == 32): r = 'w' else: r = 'x' inst += r + str(rdKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ', #' + utilFunc.binaryToHexStr(imm) result = utilFunc.logical_or('0' * N, imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, '1')
def op_i(binary, N): inst = 'AND ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0') if (N == 32): r = 'w' rnValue = rnValue[32:64] else: r = 'x' inst += r + str(rdKey) + ', ' + r + str(rnKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ', #' + str(int(imm, 2)) result = utilFunc.logical_and(rnValue, imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, '1')
def op_i(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnVal = utilFunc.getRegValueByStringkey(binary[22:27],'1') if(N == 32): rnVal = rnVal[32:64] r = 'w' elif(N == 64): r = 'x' imm12 = binary[10:22] shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", #" + utilFunc.binaryToHexStr(imm12) + ", LSL" if shiftType == "00": imm12 = imm12.zfill(N) instr = instr + " #0" elif shiftType == "01": imm12 = (imm12 + '0' * 12).zfill(N) instr = instr + " #12" to_store, isSp = utilFunc.addSub(rdKey, rnVal, imm12, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def op_sr(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) imm6 = binary[16:22] imm6Val = int(imm6, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '0') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if(N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif(N == 64): r = 'x' shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", " + r + str(rmkey) + ", " op2, instr = fetchOp2_sr(rmVal, shiftType, imm6Val, instr) instr += " #" + str(imm6Val) to_store,isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) #isSp ignored utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, '0')
def op_i(binary, N): inst = 'AND ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0') if(N == 32): r = 'w' rnValue = rnValue[32:64] else: r = 'x' inst += r + str(rdKey) + ', ' + r + str(rnKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ', #' + str(int(imm,2)) result = utilFunc.logical_and(rnValue,imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, '1')
def op_i(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') if (N == 32): rnVal = rnVal[32:64] r = 'w' elif (N == 64): r = 'x' imm12 = binary[10:22] shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str( rnKey) + ", #" + utilFunc.binaryToHexStr(imm12) + ", LSL" if shiftType == "00": imm12 = imm12.zfill(N) instr = instr + " #0" elif shiftType == "01": imm12 = (imm12 + '0' * 12).zfill(N) instr = instr + " #12" to_store, isSp = utilFunc.addSub(rdKey, rnVal, imm12, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def op_sr(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) imm6 = binary[16:22] imm6Val = int(imm6, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '0') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if (N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif (N == 64): r = 'x' shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", " + r + str( rmkey) + ", " op2, instr = fetchOp2_sr(rmVal, shiftType, imm6Val, instr) instr += " #" + str(imm6Val) to_store, isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) #isSp ignored utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, '0')
def execLsr_r32(binary): rdKey, rnKey, rmKey, rnVal, rmVal = getFields_r(binary) instr = 'LSR w' + str(rdKey) + ", w" + str(rnKey) + ", w" + str(rmKey) rd = '0' * 32 + utilFunc.lsr(rnVal[32:64], int(rmVal[59:64], 2)) utilFunc.finalize(rdKey, rd, instr, '0')
def execLsr_r64(binary): rdKey, rnKey, rmKey, rnVal, rmVal = getFields_r(binary) instr = 'LSR x' + str(rdKey) + ", x" + str(rnKey) + ", x" + str(rmKey) rd = utilFunc.lsr(rnVal, int(rmVal[58:64], 2)) utilFunc.finalize(rdKey, rd, instr, '0')