def execAnd_sr64(binary):
inst = 'AND '
rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
rmKey = utilFunc.getRegKeyByStringKey(binary[11:16])
inst += 'x' + str(rdKey) + ', x' + str(rnKey) + ', x' + str(rmKey) + ', '
rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0')
immKey = binary[16:22]
immvalue = int(immKey, 2) # amount
rmValue = utilFunc.getRegValueByStringkey(binary[11:16], '0')
shifttype = binary[8:10]
temp = ''
if shifttype == "00":
temp = utilFunc.lsl(rmValue[0:64], immvalue)
inst += 'LSL'
elif shifttype == "01":
temp = utilFunc.lsr(rmValue[0:64], immvalue)
inst += 'LSR'
elif shifttype == "10":
temp = utilFunc.asr(rmValue[0:64], immvalue)
inst += 'ASR'
else:
temp = utilFunc.ror(rmValue[0:64], immvalue)
inst += 'ROR'
inst += ' #' + str(immvalue)
to_store = utilFunc.logical_and(temp, rnValue[0:64]).zfill(const.REG_SIZE)
utilFunc.finalize(rdKey, to_store, inst, '0')
def execAnd_sr64(binary):
inst = 'AND '
rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
rmKey = utilFunc.getRegKeyByStringKey(binary[11:16])
inst += 'x' + str(rdKey) + ', x' + str(rnKey) + ', x' + str(rmKey) + ', '
rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0')
immKey = binary[16:22]
immvalue = int(immKey, 2) # amount
rmValue = utilFunc.getRegValueByStringkey(binary[11:16], '0')
shifttype = binary[8:10]
temp = ''
if shifttype == "00":
temp = utilFunc.lsl(rmValue[0:64], immvalue)
inst += 'LSL'
elif shifttype == "01":
temp = utilFunc.lsr(rmValue[0:64], immvalue)
inst += 'LSR'
elif shifttype == "10":
temp = utilFunc.asr(rmValue[0:64], immvalue)
inst += 'ASR'
else:
temp = utilFunc.ror(rmValue[0:64], immvalue)
inst += 'ROR'
inst += ' #' + str(immvalue)
to_store = utilFunc.logical_and(temp, rnValue[0:64]).zfill(const.REG_SIZE)
utilFunc.finalize(rdKey, to_store, inst, '0')
def fetchOp2_sr(rmVal, shiftType, amt, instr):
if shiftType == "00":
op2 = utilFunc.lsl(rmVal, amt)
instr += 'LSL'
elif shiftType == "01":
op2 = utilFunc.lsr(rmVal, amt)
instr += 'LSR'
elif shiftType == "10":
op2 = utilFunc.asr(rmVal, amt)
instr += 'ASR'
return op2, instr
def fetchOp2_sr(rmVal, shiftType, amt, instr):
if shiftType == "00":
op2 = utilFunc.lsl(rmVal, amt)
instr += 'LSL'
elif shiftType == "01":
op2 = utilFunc.lsr(rmVal, amt)
instr += 'LSR'
elif shiftType == "10":
op2 = utilFunc.asr(rmVal, amt)
instr += 'ASR'
return op2, instr
def helper_reg_unsignedOffset(binary, instr):
rtKey = utilFunc.getRegKeyByStringKey(binary[27:32])
rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
imm12 = binary[10:22]
opc = binary[8:10]
size = binary[0:2]
wback = False
postIndex = False
scale = utilFunc.uInt(size)
offset = utilFunc.lsl(utilFunc.zeroExtend(imm12, 64), scale)
offset = utilFunc.sInt(offset, 64)
instr += str(rtKey) + ", [x" + str(rnKey) + ", #" + str(offset) + "]"
helper_all(binary, opc, size, wback, postIndex, offset, rtKey, rnKey, scale, instr)
def helper_reg_unsignedOffset(binary, instr):
rtKey = utilFunc.getRegKeyByStringKey(binary[27:32])
rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
imm12 = binary[10:22]
opc = binary[8:10]
size = binary[0:2]
wback = False
postIndex = False
scale = utilFunc.uInt(size)
offset = utilFunc.lsl(utilFunc.zeroExtend(imm12, 64), scale)
offset = utilFunc.sInt(offset, 64)
instr += str(rtKey) + ", [x" + str(rnKey) + ", #" + str(offset) + "]"
helper_all(binary, opc, size, wback, postIndex, offset, rtKey, rnKey,
scale, instr)
def execLslLsr_i64(binary):
rdKey, rnKey, rnVal, immr, imms = getFields_i(binary)
immrVal = int(immr,2)
immsVal = int(imms,2)
if(imms == '111111'):
#LSR
shiftVal = immrVal
instr = 'LSR x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str(shiftVal)
rd = utilFunc.lsr(rnVal, shiftVal)
elif(immrVal == immsVal+1):
#LSL
shiftVal = 63-immsVal
instr = 'LSL x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str(shiftVal)
rd = utilFunc.lsl(rnVal, shiftVal)
utilFunc.finalize(rdKey, rd, instr, '0')
def execLslLsr_i32(binary):
rdKey, rnKey, rnVal, immr, imms = getFields_i(binary)
immrVal = int(immr,2)
immsVal = int(imms,2)
if(imms == '011111'):
#LSR
shiftVal = immrVal
instr = 'LSR w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str(shiftVal)
rd = '0' * 32 + utilFunc.lsr(rnVal[32:64], shiftVal)
elif(immrVal == immsVal+1):
#LSL
shiftVal = 63-immsVal
instr = 'LSL w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str(shiftVal)
rd = '0' * 32 + utilFunc.lsl(rnVal[32:64], shiftVal)
utilFunc.finalize(rdKey, rd, instr, '0')
def execLslLsr_i32(binary):
rdKey, rnKey, rnVal, immr, imms = getFields_i(binary)
immrVal = int(immr, 2)
immsVal = int(imms, 2)
if (imms == '011111'):
#LSR
shiftVal = immrVal
instr = 'LSR w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str(
shiftVal)
rd = '0' * 32 + utilFunc.lsr(rnVal[32:64], shiftVal)
elif (immrVal == immsVal + 1):
#LSL
shiftVal = 63 - immsVal
instr = 'LSL w' + str(rdKey) + ", w" + str(rnKey) + ", #" + str(
shiftVal)
rd = '0' * 32 + utilFunc.lsl(rnVal[32:64], shiftVal)
utilFunc.finalize(rdKey, rd, instr, '0')
def execLslLsr_i64(binary):
rdKey, rnKey, rnVal, immr, imms = getFields_i(binary)
immrVal = int(immr, 2)
immsVal = int(imms, 2)
if (imms == '111111'):
#LSR
shiftVal = immrVal
instr = 'LSR x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str(
shiftVal)
rd = utilFunc.lsr(rnVal, shiftVal)
elif (immrVal == immsVal + 1):
#LSL
shiftVal = 63 - immsVal
instr = 'LSL x' + str(rdKey) + ", x" + str(rnKey) + ", #" + str(
shiftVal)
rd = utilFunc.lsl(rnVal, shiftVal)
utilFunc.finalize(rdKey, rd, instr, '0')
def helper_rp(wback, postIndex, binary, instr):
rtKey = utilFunc.getRegKeyByStringKey(binary[27:32])
rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
rt2Key = utilFunc.getRegKeyByStringKey(binary[17:22])
imm7 = binary[10:17]
l = binary[9]
opc = binary[0:2]
if (l == '1'):
memOp = const.MEM_OP_LOAD
else:
memOp = const.MEM_OP_STORE
signed = (opc[1] != '0')
scale = 2 + utilFunc.uInt(opc[0])
dataSize = 8 << scale
offset = utilFunc.lsl(utilFunc.signExtend(imm7, 64), scale)
offset = utilFunc.sInt(offset, 64)
dbytes = dataSize / 8
address = utilFunc.getRegValueByStringkey(binary[22:27], '1')
address = utilFunc.uInt(address)
if not (postIndex):
address = address + offset
type = binary[7:9]
if (opc == '00'):
r = 'w'
if (opc == '10'):
r = 'x'
if (type == '01'):
#Post-index
instr += " " + r + str(rtKey) + ", " + r + str(rt2Key) + ", [x" + str(
rnKey) + "], #" + str(offset)
if (type == '11'):
#Pre-index
instr += " " + r + str(rtKey) + ", " + r + str(rt2Key) + ", [x" + str(
rnKey) + ", #" + str(offset) + "]!"
if (type == '10'):
#Signed-offset
instr += " " + r + str(rtKey) + ", " + r + str(rt2Key) + ", [x" + str(
rnKey) + ", #" + str(offset) + "]"
if (memOp == const.MEM_OP_STORE):
data1 = utilFunc.getRegValueByStringkey(binary[27:32], '0')
data2 = utilFunc.getRegValueByStringkey(binary[17:22], '0')
utilFunc.storeToMemory(data1, address, dataSize)
utilFunc.storeToMemory(data2, address + dbytes, dataSize)
elif (memOp == const.MEM_OP_LOAD):
data1 = utilFunc.fetchFromMemory(address, dataSize)
data2 = utilFunc.fetchFromMemory(address + dbytes, dataSize)
if (data1 == const.TRAP or data2 == const.TRAP):
utilFunc.finalize_simple(instr)
print "HEY!!! There seems to be a problem - memory location can not be accessed"
print "Moving ahead without executing the instruction"
return
if (signed):
data1 = utilFunc.signExtend(data1, 64)
data2 = utilFunc.signExtend(data2, 64)
utilFunc.setRegValue(rtKey, data1.zfill(64), '0')
utilFunc.setRegValue(rt2Key, data2.zfill(64), '0')
if (wback):
if postIndex:
address = address + offset
address = utilFunc.intToBinary(address, 64)
utilFunc.setRegValue(rnKey, address, '1')
utilFunc.finalize_simple(instr)
def execLsl_r64(binary):
rdKey, rnKey, rmKey, rnVal, rmVal = getFields_r(binary)
instr = 'LSL x' + str(rdKey) + ", x" + str(rnKey) + ", x" + str(rmKey)
rd = utilFunc.lsl(rnVal, int(rmVal[58:64], 2))
utilFunc.finalize(rdKey, rd, instr, '0')
def execLsl_r32(binary):
rdKey, rnKey, rmKey, rnVal, rmVal = getFields_r(binary)
instr = 'LSL w' + str(rdKey) + ", w" + str(rnKey) + ", w" + str(rmKey)
rd = '0' * 32 + utilFunc.lsl(rnVal[32:64], int(rmVal[59:64], 2))
utilFunc.finalize(rdKey, rd, instr, '0')
def execLsl_r64(binary):
rdKey, rnKey, rmKey, rnVal, rmVal = getFields_r(binary)
instr = 'LSL x' + str(rdKey) + ", x" + str(rnKey) + ", x" + str(rmKey)
rd = utilFunc.lsl(rnVal, int(rmVal[58:64], 2))
utilFunc.finalize(rdKey, rd, instr, '0')
def execLsl_r32(binary):
rdKey, rnKey, rmKey, rnVal, rmVal = getFields_r(binary)
instr = 'LSL w' + str(rdKey) + ", w" + str(rnKey) + ", w" + str(rmKey)
rd = '0' * 32 + utilFunc.lsl(rnVal[32:64], int(rmVal[59:64], 2))
utilFunc.finalize(rdKey, rd, instr, '0')
def helper_rp(wback, postIndex, binary, instr):
rtKey = utilFunc.getRegKeyByStringKey(binary[27:32])
rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
rt2Key = utilFunc.getRegKeyByStringKey(binary[17:22])
imm7 = binary[10:17]
l = binary[9]
opc = binary[0:2]
if(l == '1'):
memOp = const.MEM_OP_LOAD
else:
memOp = const.MEM_OP_STORE
signed = (opc[1] != '0')
scale = 2 + utilFunc.uInt(opc[0])
dataSize = 8 << scale
offset = utilFunc.lsl(utilFunc.signExtend(imm7, 64), scale)
offset = utilFunc.sInt(offset, 64)
dbytes = dataSize / 8;
address = utilFunc.getRegValueByStringkey(binary[22:27], '1')
address = utilFunc.uInt(address)
if not(postIndex):
address = address + offset
type = binary[7:9]
if(opc == '00'):
r = 'w'
if(opc == '10'):
r = 'x'
if(type == '01'):
#Post-index
instr += " " + r + str(rtKey) +", " + r + str(rt2Key) + ", [x" + str(rnKey) + "], #" + str(offset)
if(type == '11'):
#Pre-index
instr += " " + r + str(rtKey) +", " + r + str(rt2Key) + ", [x" + str(rnKey) + ", #" + str(offset) + "]!"
if(type == '10'):
#Signed-offset
instr += " " + r + str(rtKey) +", " + r + str(rt2Key) + ", [x" + str(rnKey) + ", #" + str(offset) + "]"
if(memOp == const.MEM_OP_STORE):
data1 = utilFunc.getRegValueByStringkey(binary[27:32], '0')
data2 = utilFunc.getRegValueByStringkey(binary[17:22], '0')
utilFunc.storeToMemory(data1, address, dataSize)
utilFunc.storeToMemory(data2, address + dbytes, dataSize)
elif(memOp == const.MEM_OP_LOAD):
data1 = utilFunc.fetchFromMemory(address, dataSize)
data2 = utilFunc.fetchFromMemory(address + dbytes, dataSize)
if(data1 == const.TRAP or data2 == const.TRAP):
utilFunc.finalize_simple(instr)
print "HEY!!! There seems to be a problem - memory location can not be accessed"
print "Moving ahead without executing the instruction"
return
if(signed):
data1 = utilFunc.signExtend(data1, 64)
data2 = utilFunc.signExtend(data2, 64)
utilFunc.setRegValue(rtKey, data1.zfill(64), '0')
utilFunc.setRegValue(rt2Key, data2.zfill(64), '0')
if(wback):
if postIndex:
address = address + offset
address = utilFunc.intToBinary(address, 64)
utilFunc.setRegValue(rnKey, address, '1')
utilFunc.finalize_simple(instr)
