def test_evaluate_ir_wide(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: bits[100], y: bits[100]) -> bits[100] { x + y }'
runner.run(
sample.Sample(
dslx_text, sample.SampleOptions(optimize_ir=False),
[[
Value.make_bits(Tag.UBITS,
ir_bits.from_long(10**30, bit_count=100)),
Value.make_bits(Tag.UBITS,
ir_bits.from_long(10**30, bit_count=100))
],
[
Value.make_bits(Tag.UBITS,
ir_bits.from_long(2**80, bit_count=100)),
Value.make_bits(Tag.UBITS,
ir_bits.from_long(2**81, bit_count=100))
]]))
self.assertSequenceEqual(
_split_nonempty_lines(sample_dir, 'sample.x.results'), [
'bits[100]:0x9_3e59_39a0_8ce9_dbd4_8000_0000',
'bits[100]:0x3_0000_0000_0000_0000_0000'
])
self.assertSequenceEqual(
_split_nonempty_lines(sample_dir, 'sample.ir.results'), [
'bits[100]:0x9_3e59_39a0_8ce9_dbd4_8000_0000',
'bits[100]:0x3_0000_0000_0000_0000_0000'
])
def test_interpret_mixed_signedness(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: s8) -> s8 { (x as s8) + y }'
runner.run(
sample.Sample(dslx_text, sample.SampleOptions(optimize_ir=False),
[[Value.make_ubits(8, 42),
Value.make_sbits(8, 100)]]))
self.assertEqual(
_read_file(sample_dir, 'sample.x.results').strip(), 'bits[8]:0x8e')
def test_interpret_dslx_single_value(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
runner.run(
sample.Sample(dslx_text, sample.SampleOptions(convert_to_ir=False),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
self.assertEqual(
_read_file(sample_dir, 'sample.x.results').strip(), 'bits[8]:0x8e')
def ir_value_to_interpreter_value(value: ir_value_mod.Value) -> Value:
"""Converts an IR Value to an interpreter Value."""
if value.is_bits():
return Value.make_bits(Tag.UBITS, value.get_bits())
elif value.is_array():
return Value.make_array(
tuple(ir_value_to_interpreter_value(e) for e in value.get_elements()))
else:
assert value.is_tuple()
return Value.make_tuple(
tuple(ir_value_to_interpreter_value(e) for e in value.get_elements()))
def test_interpret_opt_ir(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
runner.run(
sample.Sample(dslx_text, sample.SampleOptions(),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
self.assertIn('package sample', _read_file(sample_dir,
'sample.opt.ir'))
self.assertSequenceEqual(
_split_nonempty_lines(sample_dir, 'sample.opt.ir.results'),
['bits[8]:0x8e'])
def test_interpret_invalid_dslx(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'syntaxerror!!! fn main(x: u8, y: u8) -> u8 { x + y }'
with self.assertRaises(sample_runner.SampleError):
runner.run(
sample.Sample(
dslx_text, sample.SampleOptions(convert_to_ir=False),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
# Verify the exception text is written out to file.
self.assertIn('Expected start of top-level construct',
_read_file(sample_dir, 'exception.txt'))
def test_evaluate_ir_miscompare_single_result(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
runner._evaluate_ir = lambda *args: (Value.make_ubits(8, 1), )
with self.assertRaises(sample_runner.SampleError) as e:
runner.run(
sample.Sample(
dslx_text, sample.SampleOptions(optimize_ir=False),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
self.assertIn('Result miscompare for sample 0', str(e.exception))
self.assertIn('Result miscompare for sample 0',
_read_file(sample_dir, 'exception.txt'))
def test_interpret_dslx_multiple_values(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
runner.run(
sample.Sample(
dslx_text, sample.SampleOptions(convert_to_ir=False),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)],
[Value.make_ubits(8, 222),
Value.make_ubits(8, 240)]]))
self.assertSequenceEqual(
_split_nonempty_lines(sample_dir, 'sample.x.results'),
['bits[8]:0x8e', 'bits[8]:0xce'])
def test_bits_value_hex(self):
self.assertEqual(
value_from_string('bits[3]:0x7'),
Value.make_ubits(bit_count=3, value=7))
self.assertEqual(
value_from_string('bits[1]:0x1'),
Value.make_ubits(bit_count=1, value=1))
self.assertEqual(
value_from_string('bits[1]:0x0'),
Value.make_ubits(bit_count=1, value=0))
self.assertEqual(
value_from_string('bits[8]:0xff'),
Value.make_ubits(bit_count=8, value=0xff))
self.assertEqual(
value_from_string('u8:0xff'), Value.make_ubits(bit_count=8, value=0xff))
def generate_argument(arg_type: ConcreteType, rng: ast_generator.RngState,
prior: Sequence[Value]) -> Value:
"""Generates an argument value of the same type as the concrete type."""
if isinstance(arg_type, TupleType):
return Value.make_tuple(
tuple(
generate_argument(t, rng, prior)
for t in arg_type.get_unnamed_members()))
elif isinstance(arg_type, ArrayType):
return Value.make_array(
tuple(
generate_argument(arg_type.get_element_type(), rng, prior)
for _ in range(arg_type.size.value)))
else:
assert isinstance(arg_type, BitsType)
if not prior or rng.random() < 0.5:
return _generate_unbiased_argument(arg_type, rng)
# Try to mutate a prior argument. If it happens to not be a bits type then
# just generate an unbiased argument.
index = rng.randrange(len(prior))
if not prior[index].is_bits():
return _generate_unbiased_argument(arg_type, rng)
to_mutate = prior[index].get_bits()
bit_count = arg_type.get_total_bit_count().value
if bit_count > to_mutate.bit_count():
addendum = _generate_bit_value(bit_count - to_mutate.bit_count(),
rng,
signed=False)
assert addendum.get_bit_count() + to_mutate.bit_count() == bit_count
to_mutate = to_mutate.concat(addendum.get_bits())
else:
to_mutate = to_mutate.slice(0, bit_count)
assert to_mutate.bit_count() == bit_count, (to_mutate.bit_count(),
bit_count)
value = to_mutate.to_uint()
mutation_count = rng.randrange_biased_towards_zero(bit_count)
for _ in range(mutation_count):
# Pick a random bit and flip it.
bitno = rng.randrange(bit_count)
value ^= 1 << bitno
signed = arg_type.get_signedness()
tag = Tag.SBITS if signed else Tag.UBITS
return Value.make_bits(tag,
ir_bits.from_long(value=value, bit_count=bit_count))
def ir_value_to_interpreter_value(value: ir_value_mod.Value) -> Value:
"""Converts an IR Value to an interpreter Value."""
if value.is_bits():
if value.get_bits().bit_count() <= 64:
return Value.make_bits(Tag.UBITS, value.get_bits())
else:
# For wide values which do not fit in 64 bits, parse value as as string.
return value_from_string(value.to_str(FormatPreference.HEX))
elif value.is_array():
return Value.make_array(
tuple(ir_value_to_interpreter_value(e) for e in value.get_elements()))
else:
assert value.is_tuple()
return Value.make_tuple(
tuple(ir_value_to_interpreter_value(e) for e in value.get_elements()))
def test_sign_convert_tuple_value(self):
# type is (u8, (u16, s8)
t = TupleType(
(BitsType(signed=False, size=8),
TupleType((BitsType(signed=False,
size=16), BitsType(signed=True, size=8)))))
self.assertEqual(
sample_runner.sign_convert_value(
t,
Value.make_tuple((Value.make_ubits(8, 0x42),
Value.make_tuple(
(Value.make_ubits(16, 0x33),
Value.make_ubits(8, 0x44)))))),
Value.make_tuple((Value.make_ubits(8, 0x42),
Value.make_tuple((Value.make_ubits(16, 0x33),
Value.make_sbits(8, 0x44))))))
def _generate_bit_value(bit_count: int, rng: ast_generator.RngState,
signed: bool) -> Value:
assert isinstance(bit_count, int), bit_count
assert isinstance(rng, ast_generator.RngState), rng
bits = ast_generator.choose_bit_pattern(bit_count, rng)
tag = Tag.SBITS if signed else Tag.UBITS
return Value.make_bits(tag, bits)
def value_from_scanner(s: Scanner) -> Value:
"""Recursive call for converting a stream of tokens into a value."""
s = _LookaheadWrapper(s)
if s.try_pop(TokenKind.OPAREN):
elements = []
must_end = False
while True:
if s.try_pop(TokenKind.CPAREN):
break
if must_end:
s.pop_or_error(TokenKind.CPAREN)
break
elements.append(value_from_scanner(s))
must_end = not s.try_pop(TokenKind.COMMA)
return Value.make_tuple(tuple(elements))
if s.try_pop(TokenKind.OBRACK):
elements = []
must_end = False
while True:
if s.try_pop(TokenKind.CBRACK):
break
if must_end:
s.pop_or_error(TokenKind.CBRACK)
break
elements.append(value_from_scanner(s))
must_end = not s.try_pop(TokenKind.COMMA)
return Value.make_array(tuple(elements))
if s.try_pop_keyword(Keyword.BITS) or s.try_pop_keyword(Keyword.UN):
return _bit_value_from_scanner(s, signed=False)
if s.try_pop_keyword(Keyword.BITS) or s.try_pop_keyword(Keyword.SN):
return _bit_value_from_scanner(s, signed=True)
tok = s.pop()
if tok.is_type_keyword():
type_ = tok
s.pop_or_error(TokenKind.COLON)
value_tok = s.pop_or_error(TokenKind.NUMBER)
signedness, bit_count = scanner_mod.TYPE_KEYWORDS_TO_SIGNEDNESS_AND_BITS[
type_.value]
constructor = Value.make_sbits if signedness else Value.make_ubits
return constructor(bit_count=bit_count,
value=ast_helpers.get_token_value_as_int(value_tok))
raise ScanError(tok.span.start,
'Unexpected token in value; found {}'.format(tok.kind))
def sign_convert_value(concrete_type: ConcreteType, value: Value) -> Value:
"""Converts the values to matched the signedness of the concrete type.
Converts bits-typed Values contained within the given Value to match the
signedness of the ConcreteType. Examples:
invocation: sign_convert_value(s8, u8:64)
returns: s8:64
invocation: sign_convert_value(s3, u8:7)
returns: s3:-1
invocation: sign_convert_value((s8, u8), (u8:42, u8:10))
returns: (s8:42, u8:10)
This conversion functionality is required because the Values used in the DSLX
may be signed while Values in IR interpretation and Verilog simulation are
always unsigned.
This function is idempotent.
Args:
concrete_type: ConcreteType to match.
value: Input value.
Returns:
Sign-converted value.
"""
if isinstance(concrete_type, concrete_type_mod.TupleType):
assert value.is_tuple()
assert len(value.get_elements()) == concrete_type.get_tuple_length()
return Value.make_tuple(
tuple(
sign_convert_value(t, a) for t, a in zip(
concrete_type.get_unnamed_members(), value.get_elements())))
elif isinstance(concrete_type, concrete_type_mod.ArrayType):
assert value.is_array()
assert len(value.get_elements()) == concrete_type.size
return Value.make_array(
tuple(
sign_convert_value(concrete_type.get_element_type(), v)
for v in value.get_elements()))
elif concrete_type_mod.is_sbits(concrete_type):
return Value.make_bits(Tag.SBITS, value.get_bits())
else:
assert concrete_type_mod.is_ubits(concrete_type)
return value
def test_codegen_combinational_wrong_results(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
runner._simulate = lambda *args: (Value.make_ubits(8, 1), )
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
with self.assertRaises(sample_runner.SampleError) as e:
runner.run(
sample.Sample(
dslx_text,
sample.SampleOptions(
codegen=True,
codegen_args=['--generator=combinational'],
simulate=True,
simulator='iverilog'),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
self.assertIn('Result miscompare for sample 0', str(e.exception))
def test_ir_input(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
ir_text = """package foo
fn foo(x: bits[8], y: bits[8]) -> bits[8] {
ret add.1: bits[8] = add(x, y)
}
"""
runner.run(
sample.Sample(ir_text, sample.SampleOptions(input_is_dslx=False),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
self.assertIn('package foo', _read_file(sample_dir, 'sample.ir'))
self.assertIn('package foo', _read_file(sample_dir, 'sample.opt.ir'))
self.assertSequenceEqual(
_split_nonempty_lines(sample_dir, 'sample.opt.ir.results'),
['bits[8]:0x8e'])
def test_sign_convert_array_value(self):
t = ArrayType(BitsType(signed=True, size=8), 3)
self.assertEqual(
sample_runner.sign_convert_value(
t,
Value.make_array(
(Value.make_ubits(8, 0x42), Value.make_ubits(8, 0x43),
Value.make_ubits(8, 0x44)))),
Value.make_array(
(Value.make_sbits(8, 0x42), Value.make_sbits(8, 0x43),
Value.make_sbits(8, 0x44))))
def test_codegen_pipeline(self):
sample_dir = self._make_sample_dir()
print('sample_dir = ' + sample_dir)
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
runner.run(
sample.Sample(
dslx_text,
sample.SampleOptions(codegen=True,
codegen_args=('--generator=pipeline',
'--pipeline_stages=2'),
simulate=True),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
# A pipelined block should have a blocking assignment.
self.assertIn('<=', _read_file(sample_dir, 'sample.v'))
self.assertSequenceEqual(
_split_nonempty_lines(sample_dir, 'sample.v.results'),
['bits[8]:0x8e'])
def test_sign_convert_args_batch(self):
dslx_text = 'fn main(y: s8) -> s8 { y }'
filename = '/fake/test_module.x'
with fakefs_test_util.scoped_fakefs(filename, dslx_text):
m = parser_helpers.parse_text(dslx_text,
'test_module',
print_on_error=True,
filename=filename)
f = m.get_function('main')
self.assertEqual(
sample_runner.sign_convert_args_batch(
f, m, ((Value.make_ubits(8, 2), ), )),
((Value.make_sbits(8, 2), ), ))
# Converting a value which is already signed is no problem.
self.assertEqual(
sample_runner.sign_convert_args_batch(
f, m, ((Value.make_sbits(8, 2), ), )),
((Value.make_sbits(8, 2), ), ))
def _generate_bit_value(bit_count: int, rng: Random, signed: bool) -> Value:
assert isinstance(bit_count, int), bit_count
p = rng.random()
if p < 0.9: # Most of the time, use some interesting bit pattern.
value = rng.choice(ast_generator.make_bit_patterns(bit_count))
else: # 10% of the time use a completely random value.
value = rng.randrange(0, 2**bit_count)
tag = Tag.SBITS if signed else Tag.UBITS
return Value.make_bits(tag,
ir_bits.from_long(value=value, bit_count=bit_count))
def test_codegen_combinational(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
runner.run(
sample.Sample(
dslx_text,
sample.SampleOptions(
codegen=True,
codegen_args=['--generator=combinational'],
simulate=True),
[[Value.make_ubits(8, 42),
Value.make_ubits(8, 100)]]))
self.assertIn('endmodule', _read_file(sample_dir, 'sample.v'))
# A combinational block should not have a blocking assignment.
self.assertNotIn('<=', _read_file(sample_dir, 'sample.v'))
self.assertSequenceEqual(
_split_nonempty_lines(sample_dir, 'sample.v.results'),
['bits[8]:0x8e'])
def _bit_value_from_scanner(s: Scanner, signed: bool) -> Value:
s.pop_or_error(TokenKind.OBRACK)
bit_count_tok = s.pop_or_error(TokenKind.NUMBER)
s.pop_or_error(TokenKind.CBRACK)
s.pop_or_error(TokenKind.COLON)
value_tok = s.pop_or_error(TokenKind.NUMBER)
tag = Tag.SBITS if signed else Tag.UBITS
return Value.make_bits(
tag,
ir_bits.from_long(
bit_count=ast_helpers.get_token_value_as_int(bit_count_tok),
value=ast_helpers.get_token_value_as_int(value_tok)))
def test_interpret_opt_ir_miscompare(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
results = [
(Value.make_ubits(8, 100), ), # correct result
(Value.make_ubits(8, 100), ), # correct result
(Value.make_ubits(8, 0), ), # incorrect result
]
def result_gen(*_):
return results.pop(0)
runner._evaluate_ir = result_gen
with self.assertRaises(sample_runner.SampleError) as e:
runner.run(
sample.Sample(
dslx_text, sample.SampleOptions(),
[[Value.make_ubits(8, 40),
Value.make_ubits(8, 60)]]))
self.assertIn('Result miscompare for sample 0', str(e.exception))
self.assertIn('evaluated opt IR (JIT)', str(e.exception))
def test_evaluate_ir_miscompare_number_of_results(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
# Give back two results instead of one.
def fake_evaluate_ir(*_):
return (Value.make_ubits(8, 100), Value.make_ubits(8, 100))
runner._evaluate_ir = fake_evaluate_ir
args_batch = [(Value.make_ubits(8, 42), Value.make_ubits(8, 64))]
with self.assertRaises(sample_runner.SampleError) as e:
runner.run(
sample.Sample(dslx_text,
sample.SampleOptions(optimize_ir=False),
args_batch))
self.assertIn(
'Results for evaluated unopt IR (JIT) has 2 values, interpreted DSLX has 1',
str(e.exception))
self.assertIn(
'Results for evaluated unopt IR (JIT) has 2 values, interpreted DSLX has 1',
_read_file(sample_dir, 'exception.txt'))
def test_parse_args(self):
self.assertEqual(sample.parse_args(''), tuple())
self.assertEqual(sample.parse_args('bits[8]:42'),
(interp_value_from_ir_string('bits[8]:42'), ))
self.assertEqual(sample.parse_args('bits[8]:42; bits[16]:1234'),
(interp_value_from_ir_string('bits[8]:42'),
interp_value_from_ir_string('bits[16]:1234')))
self.assertEqual(
sample.parse_args(
'bits[8]:42; (bits[8]:0x42, (bits[16]:0x33, bits[8]:0x44))'),
(interp_value_from_ir_string('bits[8]:42'),
Value.make_tuple(
(interp_value_from_ir_string('bits[8]:0x42'),
Value.make_tuple(
(interp_value_from_ir_string('bits[16]:0x33'),
interp_value_from_ir_string('bits[8]:0x44')))))))
self.assertEqual(
sample.parse_args('[bits[8]:0x42, bits[8]:0x43, bits[8]:0x44]'),
(Value.make_array(
tuple(
interp_value_from_ir_string(f'bits[8]:{v}')
for v in (0x42, 0x43, 0x44))), ))
def test_array_values(self):
self.assertEqual(
value_from_string('[(u8:0xff, u2:0x1), (u8:0, u2:3)]'),
Value.make_array((
Value.make_tuple((
Value.make_ubits(bit_count=8, value=0xff),
Value.make_ubits(bit_count=2, value=1),
)),
Value.make_tuple((
Value.make_ubits(bit_count=8, value=0x0),
Value.make_ubits(bit_count=2, value=3),
)),
)))
def test_evaluate_ir_miscompare_number_of_results(self):
sample_dir = self._make_sample_dir()
runner = sample_runner.SampleRunner(sample_dir)
dslx_text = 'fn main(x: u8, y: u8) -> u8 { x + y }'
runner._evaluate_ir = lambda *args: (Value.make_ubits(8, 100), )
with self.assertRaises(sample_runner.SampleError) as e:
runner.run(
sample.Sample(dslx_text,
sample.SampleOptions(optimize_ir=False), []))
self.assertIn(
'Results for interpreted DSLX has 0 values, evaluated unopt IR (interpreter) has 1',
str(e.exception))
self.assertIn(
'Results for interpreted DSLX has 0 values, evaluated unopt IR (interpreter) has 1',
_read_file(sample_dir, 'exception.txt'))
def convert_interpreter_value_to_ir(
interpreter_value: dslx_value.Value) -> ir_value.Value:
"""Recursively translates a DSLX Value into an IR Value."""
if interpreter_value.is_bits() or interpreter_value.is_enum():
return ir_value.Value(interpreter_value.get_bits())
elif interpreter_value.is_array():
ir_arr = []
for e in interpreter_value.get_elements():
ir_arr.append(convert_interpreter_value_to_ir(e))
return ir_value.Value.make_array(ir_arr)
elif interpreter_value.is_tuple():
ir_tuple = []
for e in interpreter_value.get_elements():
ir_tuple.append(convert_interpreter_value_to_ir(e))
return ir_value.Value.make_tuple(ir_tuple)
else:
raise UnsupportedJitConversionError(
"Can't convert to JIT value: {}".format(interpreter_value))
def test_tuple_values(self):
self.assertEqual(
value_from_string('(bits[8]:0xff, bits[2]:0x1)'),
Value.make_tuple((
Value.make_ubits(bit_count=8, value=0xff),
Value.make_ubits(bit_count=2, value=1),
)))
self.assertEqual(value_from_string('()'), Value.make_tuple(()))
# Tuple of single element.
want = Value.make_tuple((Value.make_ubits(bit_count=2, value=1),))
got = value_from_string('(bits[2]:0x1,)')
self.assertEqual(want, got)
with self.assertRaises(ValueParseError) as cm:
value_from_string('(,)')
self.assertIn('Unexpected token in value', str(cm.exception))
