def _run_on_host(k_class, *args, **kwargs):
device_mgr = dict()
device_mgr["core"] = sim_devices.Core(device_mgr)
k_inst = k_class((device_mgr, None, None), *args, **kwargs)
k_inst.run()
return k_inst
def main():
from artiq.sim import devices
dmgr = dict()
dmgr["core"] = devices.Core(dmgr)
for wo in "abcd":
dmgr[wo] = devices.WaveOutput(dmgr, wo)
exp = SimpleSimulation(dmgr)
exp.run()
def main():
from artiq.sim import devices as sd
core = sd.Core()
exp = SimpleSimulation(
core=core,
a=sd.WaveOutput(core=core, name="a"),
b=sd.WaveOutput(core=core, name="b"),
c=sd.WaveOutput(core=core, name="c"),
d=sd.WaveOutput(core=core, name="d"),
)
exp.run()
def setUp(self):
core_language.set_time_manager(sim_time.Manager())
self.rtio_manager = RTIOManager()
self.rtio_manager.patch(spline)
self.rtio_manager.patch(sawg)
self.core = sim_devices.Core({})
self.core.coarse_ref_period = 20/3
self.core.ref_multiplier = 1
self.t = self.core.coarse_ref_period
self.channel = mg.ClockDomainsRenamer({"rio_phy": "sys"})(
Channel(width=16, parallelism=2))
self.driver = sawg.SAWG({"core": self.core}, channel_base=0,
parallelism=self.channel.parallelism)
def _run_on_host(k_class, **parameters):
coredev = sim_devices.Core()
k_inst = k_class(core=coredev, **parameters)
k_inst.run()
def _run_on_host(k_class, **arguments):
dmgr = dict()
dmgr["core"] = sim_devices.Core(dmgr)
k_inst = k_class(dmgr, **arguments)
k_inst.run()
return k_inst
