Ejemplo n.º 1
0
def reset():
  gpio = AXI_GPIO(gpio_devices['axi_gpio_2'])
  gpio.write_axi_gpio(0xffff0000,channel=2)
  gpio.write_axi_gpio(0x0000ffff,channel=2)
  
  #disable mod
  gpio.clear_bit(0, channel=1)
Ejemplo n.º 2
0
 def __init__(self):
     self.dacRes = 65536
     self.dacRange = [-10, 10]
     self.dacRangeConv = float(167772) / self.dacRes
     self.dacIncrMax = 268435455
     self.dacTimeRes = 1.6e3  # in us
     self.ddsAmpRange = [0, 5]
     self.ddsFreqRange = [0, 500]
     self.ddsFreqRangeConv = 8589930  # (2^32 - 1)/500 MHz
     self.ddsAmpRangeConv = 818.4  # (2^10 - 1)/1.25 mW
     self.ddsTimeRes = 1.6e3  # in us
     # initialize DACs
     self.dac0 = DAC81416(fifo_devices['DAC81416_0'])
     self.dac1 = DAC81416(fifo_devices['DAC81416_1'])
     self.dds0 = AD9959(fifo_devices['AD9959_0'])
     self.dds1 = AD9959(fifo_devices['AD9959_1'])
     self.dds2 = AD9959(fifo_devices['AD9959_2'])
     self.fifo_dac0_seq = AXIS_FIFO(fifo_devices['DAC81416_0_seq'])
     self.fifo_dac1_seq = AXIS_FIFO(fifo_devices['DAC81416_1_seq'])
     # initialize DDSs
     self.fifo_dds_atw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_atw'])
     self.fifo_dds_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_ftw'])
     self.fifo_dds0_atw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_atw'])
     self.fifo_dds0_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_ftw'])
     self.fifo_dds1_atw_seq = AXIS_FIFO(fifo_devices['AD9959_1_seq_atw'])
     self.fifo_dds1_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_1_seq_ftw'])
     self.fifo_dds2_atw_seq = AXIS_FIFO(fifo_devices['AD9959_2_seq_atw'])
     self.fifo_dds2_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_2_seq_ftw'])
     # self.dds = AD9959(dds_device) # initialize DDS
     self.gpio2 = AXI_GPIO(gpio_devices['axi_gpio_2'])
     self.fifo_dio_seq = AXIS_FIFO(fifo_devices['GPIO_seq'])
Ejemplo n.º 3
0
  def __init__(self, device, device_atw_seq, device_ftw_seq, main_seq):
    #self.dds   = AD9959(device) # initialize DDS   -- not needed for now

    self.gpio2 = AXI_GPIO(gpio_devices['axi_gpio_2'])

    self.fifo_dds_atw_seq = AXIS_FIFO(device_atw_seq)
    self.fifo_dds_ftw_seq = AXIS_FIFO(device_ftw_seq)
    self.fifo_main_seq    = AXIS_FIFO(main_seq)
Ejemplo n.º 4
0
 def __init__(self, dac_a, dac_b, device_seq0, device_seq1, main_seq):
     self.dac_a = dac_a
     DAC81416(dac_a)  # initialize DAC
     self.dac_b = dac_b
     DAC81416(dac_b)  # initialize DAC
     self.gpio2 = AXI_GPIO(gpio_devices['axi_gpio_2'])
     self.fifo_dac_seq0 = AXIS_FIFO(device_seq0)
     self.fifo_dac_seq1 = AXIS_FIFO(device_seq1)
     self.fifo_main_seq = AXIS_FIFO(main_seq)
Ejemplo n.º 5
0
def trigger():
  gpio = AXI_GPIO(gpio_devices['axi_gpio_2'])
  reg=gpio.read_axi_gpio(channel=1)
  data_unset=struct.pack('4B', (reg[0]), (reg[1]), (reg[2]), (reg[3])&253) #mask bit1 on LSB
  data_set=struct.pack('4B', (reg[0]), (reg[1]), (reg[2]), (reg[3])|2)     #set bit1 on LSB and write

  print(data_unset, data_set)

  gpio.write_axi_gpio(data_unset,channel=1)
  gpio.write_axi_gpio(data_set,channel=1)
  gpio.write_axi_gpio(data_unset,channel=1)
def trigger():
  gpio = AXI_GPIO(gpio_devices['axi_gpio_2'])
  
  #enable mod
  gpio.set_bit(0, channel=1)
  
  reg=gpio.read_axi_gpio(channel=1)

  data_unset=struct.pack('4B', ord(reg[0]), ord(reg[1]), ord(reg[2]), ord(reg[3])&253) #mask bit1 on LSB
  data_set=struct.pack('4B', ord(reg[0]), ord(reg[1]), ord(reg[2]), ord(reg[3])|2)     #set bit1 on LSB and write

  gpio.write_axi_gpio(data_unset,channel=1)
  gpio.write_axi_gpio(data_set,channel=1)
  gpio.write_axi_gpio(data_unset,channel=1)
Ejemplo n.º 7
0
	def __init__(self):
		self.dacRes = 65535 #0xffff
		self.dacRange = [-10, 10]

		self.dacIncrMax = 0xffffffff # 32bit
		self.dacRampTimeRes = 2000 #20us in the unit of system clk (10ns)
		self.ddsAmpRange = [0, 5]
		self.ddsFreqRange = [0, 500]

		self.accUpdateFreq = 1.0 # accumulator update freq in MHz, not really used, for reminder
		self.ddsUpdateFreq = 50.0 # dds update freq in kHz, not really used, for reminder

		self.ddsFreqRangeConv = 0xffffffff / 500.0  #8589930 # (2^32 - 1)/500 MHz
		self.ddsAmpRangeConv = 0x3ff/100 # (2^10 - 1)/100
		
		self.ddsFreqIncMax = 0xfffffffffff # 32 ftw + 12 acc = 44bit
		self.ddsAmpIncMax = 0x3fffff # 10 atw + 12 acc = 22bit
		# self.ddsTimeRes = 1.0e3 # in us
		
		# initialize DACs
		self.dac0 = DAC81416(fifo_devices['DAC81416_0'])
		self.dac1 = DAC81416(fifo_devices['DAC81416_1'])
		self.dds0 = AD9959(fifo_devices['AD9959_0'])
		self.dds1 = AD9959(fifo_devices['AD9959_1'])
		self.dds2 = AD9959(fifo_devices['AD9959_2'])
		self.fifo_dac0_seq = AXIS_FIFO(fifo_devices['DAC81416_0_seq'])
		self.fifo_dac1_seq = AXIS_FIFO(fifo_devices['DAC81416_1_seq'])
		dds_lock_pll.dds_lock_pll()

		# initialize DDSs
		self.fifo_dds0_atw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_atw'])
		self.fifo_dds0_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_ftw'])
		self.fifo_dds1_atw_seq = AXIS_FIFO(fifo_devices['AD9959_1_seq_atw'])
		self.fifo_dds1_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_1_seq_ftw'])
		self.fifo_dds2_atw_seq = AXIS_FIFO(fifo_devices['AD9959_2_seq_atw'])
		self.fifo_dds2_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_2_seq_ftw'])
		# self.dds = AD9959(dds_device) # initialize DDS
		self.gpio2 = AXI_GPIO(gpio_devices['axi_gpio_2'])
		self.fifo_dio_seq = AXIS_FIFO(fifo_devices['GPIO_seq'])

		reset()
Ejemplo n.º 8
0
    def __init__(self):
        self.dacRes = 65536  #0xffff
        self.dacRange = [-10, 10]
        self.dacRangeConv = float(167772) / self.dacRes

        self.dacIncrMax = 0xfffffff  # 16 atw + 12 acc = 28bit #268435455
        # self.dacTimeRes = 1.6e3 # in us

        self.ddsAmpRange = [0, 5]
        self.ddsFreqRange = [0, 500]

        self.accUpdateFreq = 1.0  # accumulator update freq in MHz, not really used, for reminder
        self.ddsUpdateFreq = 50.0  # dds update freq in kHz, not really used, for reminder

        self.ddsFreqRangeConv = 0xffffffff / 500.0  #8589930 # (2^32 - 1)/500 MHz
        self.ddsAmpRangeConv = 0x3ff / 1.25  #818.4 # (2^10 - 1)/1.25 mW

        self.ddsFreqIncMax = 0xfffffffffff  # 32 ftw + 12 acc = 44bit
        self.ddsAmpIncMax = 0x3fffff  # 10 atw + 12 acc = 22bit
        # self.ddsTimeRes = 1.0e3 # in us

        # initialize DACs
        self.dac0 = DAC81416(fifo_devices['DAC81416_0'])
        self.dac1 = DAC81416(fifo_devices['DAC81416_1'])
        self.dds0 = AD9959(fifo_devices['AD9959_0'])
        self.dds1 = AD9959(fifo_devices['AD9959_1'])
        self.dds2 = AD9959(fifo_devices['AD9959_2'])
        self.fifo_dac0_seq = AXIS_FIFO(fifo_devices['DAC81416_0_seq'])
        self.fifo_dac1_seq = AXIS_FIFO(fifo_devices['DAC81416_1_seq'])
        # initialize DDSs
        self.fifo_dds_atw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_atw'])
        self.fifo_dds_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_ftw'])
        self.fifo_dds0_atw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_atw'])
        self.fifo_dds0_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_0_seq_ftw'])
        self.fifo_dds1_atw_seq = AXIS_FIFO(fifo_devices['AD9959_1_seq_atw'])
        self.fifo_dds1_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_1_seq_ftw'])
        self.fifo_dds2_atw_seq = AXIS_FIFO(fifo_devices['AD9959_2_seq_atw'])
        self.fifo_dds2_ftw_seq = AXIS_FIFO(fifo_devices['AD9959_2_seq_ftw'])
        # self.dds = AD9959(dds_device) # initialize DDS
        self.gpio2 = AXI_GPIO(gpio_devices['axi_gpio_2'])
        self.fifo_dio_seq = AXIS_FIFO(fifo_devices['GPIO_seq'])
Ejemplo n.º 9
0
def reset():
  gpio = AXI_GPIO(gpio_devices['axi_gpio_2'])
  gpio.write_axi_gpio(0xffff0000,channel=2)
  gpio.write_axi_gpio(0x0000ffff,channel=2)