def _init_ops(data: Dict[str, Any]) -> 'cirq.OP_TREE':
if 'init' not in data:
return []
init = data['init']
if not isinstance(init, List):
raise ValueError(f'Circuit JSON init must be a list but was {init!r}.')
init_ops = []
for i in range(len(init)):
state = init[i]
q = devices.LineQubit(i)
if state == 0:
pass
elif state == 1:
init_ops.append(ops.X(q))
elif state == '+':
init_ops.append(ops.Ry(np.pi / 2).on(q))
elif state == '-':
init_ops.append(ops.Ry(-np.pi / 2).on(q))
elif state == 'i':
init_ops.append(ops.Rx(-np.pi / 2).on(q))
elif state == '-i':
init_ops.append(ops.Rx(np.pi / 2).on(q))
else:
raise ValueError(f'Unrecognized init state: {state!r}')
return ops.Moment(init_ops)
def convert_one(self, op: ops.Operation) -> ops.OP_TREE:
"""Convert a single (one- or two-qubit) operation
into ion trap native gates
Args:
op: gate operation to be converted
Returns:
the desired operation implemented with ion trap gates
"""
# Known gate name
if not isinstance(op, ops.GateOperation):
raise TypeError("{!r} is not a gate operation.".format(op))
if is_native_ion_gate(op.gate):
return [op]
# one choice of known Hadamard gate decomposition
if isinstance(op.gate, ops.HPowGate) and op.gate.exponent == 1:
return [
ops.Rx(np.pi).on(op.qubits[0]),
ops.Ry(-1 * np.pi / 2).on(op.qubits[0])
]
# one choice of known CNOT gate decomposition
if isinstance(op.gate, ops.CNotPowGate) and op.gate.exponent == 1:
return [
ops.Ry(np.pi / 2).on(op.qubits[0]),
MS(np.pi / 4).on(op.qubits[0], op.qubits[1]),
ops.Rx(-1 * np.pi / 2).on(op.qubits[0]),
ops.Rx(-1 * np.pi / 2).on(op.qubits[1]),
ops.Ry(-1 * np.pi / 2).on(op.qubits[0])
]
# Known matrix
mat = protocols.unitary(op, None) if len(op.qubits) <= 2 else None
if mat is not None and len(op.qubits) == 1:
gates = optimizers.single_qubit_matrix_to_phased_x_z(mat)
return [g.on(op.qubits[0]) for g in gates]
elif mat is not None and len(op.qubits) == 2:
return two_qubit_matrix_to_ion_operations(op.qubits[0],
op.qubits[1], mat)
else:
if self.ignore_failures:
return [op]
else:
raise TypeError("Don't know how to work with {!r}. "
"It isn't a native Ion Trap operation, "
"a 1 or 2 qubit gate with a known unitary, "
"or composite.".format(op.gate))
def _decompose_xx_yy_into_two_fsims_ignoring_single_qubit_ops(
*,
qubits: Sequence['cirq.Qid'],
fsim_gate: 'cirq.FSimGate',
canonical_x_kak_coefficient: float,
canonical_y_kak_coefficient: float,
atol: float = 1e-8) -> List['cirq.Operation']:
x = canonical_x_kak_coefficient
y = canonical_y_kak_coefficient
assert 0 <= y <= x <= np.pi / 4
eta = np.sin(x)**2 * np.cos(y)**2 + np.cos(x)**2 * np.sin(y)**2
xi = abs(np.sin(2 * x) * np.sin(2 * y))
t = fsim_gate.phi / 2
kappa = np.sin(fsim_gate.theta)**2 - np.sin(t)**2
s_sum = (eta - np.sin(t)**2) / kappa
s_dif = 0.5 * xi / kappa
a_dif = _sticky_0_to_1(s_sum + s_dif, atol=atol)
a_sum = _sticky_0_to_1(s_sum - s_dif, atol=atol)
if a_dif is None or a_sum is None:
raise ValueError(
f'Failed to synthesize XX^{x/np.pi}·YY^{y/np.pi} from two '
f'{fsim_gate!r} separated by single qubit operations.')
x_dif = np.arcsin(np.sqrt(a_dif))
x_sum = np.arcsin(np.sqrt(a_sum))
x_a = x_sum + x_dif
x_b = x_dif - x_sum
a, b = qubits
return [
fsim_gate(a, b),
ops.Rz(t + np.pi).on(a),
ops.Rz(t).on(b),
ops.Rx(x_a).on(a),
ops.Rx(x_b).on(b),
fsim_gate(a, b),
]
class QasmParser:
"""Parser for QASM strings.
Example:
qasm = "OPENQASM 2.0; qreg q1[2]; CX q1[0], q1[1];"
parsedQasm = QasmParser().parse(qasm)
"""
def __init__(self):
self.parser = yacc.yacc(module=self, debug=False, write_tables=False)
self.circuit = Circuit()
self.qregs: Dict[str, int] = {}
self.cregs: Dict[str, int] = {}
self.qelibinc = False
self.lexer = QasmLexer()
self.supported_format = False
self.parsedQasm: Optional[Qasm] = None
self.qubits: Dict[str, ops.Qid] = {}
self.functions = {
'sin': np.sin,
'cos': np.cos,
'tan': np.tan,
'exp': np.exp,
'ln': np.log,
'sqrt': np.sqrt,
'acos': np.arccos,
'atan': np.arctan,
'asin': np.arcsin
}
self.binary_operators = {
'+': operator.add,
'-': operator.sub,
'*': operator.mul,
'/': operator.truediv,
'^': operator.pow
}
basic_gates: Dict[str, QasmGateStatement] = {
'CX':
QasmGateStatement(qasm_gate='CX',
cirq_gate=CX,
num_params=0,
num_args=2),
'U':
QasmGateStatement(
qasm_gate='U',
num_params=3,
num_args=1,
# QasmUGate expects half turns
cirq_gate=(lambda params: QasmUGate(*[p / np.pi for p in params])))
}
qelib_gates = {
'rx':
QasmGateStatement(qasm_gate='rx',
cirq_gate=(lambda params: ops.Rx(params[0])),
num_params=1,
num_args=1),
'ry':
QasmGateStatement(qasm_gate='ry',
cirq_gate=(lambda params: ops.Ry(params[0])),
num_params=1,
num_args=1),
'rz':
QasmGateStatement(qasm_gate='rz',
cirq_gate=(lambda params: ops.Rz(params[0])),
num_params=1,
num_args=1),
'id':
QasmGateStatement(qasm_gate='id',
cirq_gate=ops.IdentityGate(1),
num_params=0,
num_args=1),
'u2':
QasmGateStatement(qasm_gate='u2',
cirq_gate=(lambda params: QasmUGate(
0.5, params[0] / np.pi, params[1] / np.pi)),
num_params=2,
num_args=1),
'u3':
QasmGateStatement(
qasm_gate='u3',
num_params=3,
num_args=1,
cirq_gate=(lambda params: QasmUGate(*[p / np.pi
for p in params]))),
'x':
QasmGateStatement(qasm_gate='x',
num_params=0,
num_args=1,
cirq_gate=ops.X),
'y':
QasmGateStatement(qasm_gate='y',
num_params=0,
num_args=1,
cirq_gate=ops.Y),
'z':
QasmGateStatement(qasm_gate='z',
num_params=0,
num_args=1,
cirq_gate=ops.Z),
'h':
QasmGateStatement(qasm_gate='h',
num_params=0,
num_args=1,
cirq_gate=ops.H),
's':
QasmGateStatement(qasm_gate='s',
num_params=0,
num_args=1,
cirq_gate=ops.S),
't':
QasmGateStatement(qasm_gate='t',
num_params=0,
num_args=1,
cirq_gate=ops.T),
'cx':
QasmGateStatement(qasm_gate='cx',
cirq_gate=CX,
num_params=0,
num_args=2),
'cy':
QasmGateStatement(qasm_gate='cy',
cirq_gate=ops.ControlledGate(ops.Y),
num_params=0,
num_args=2),
'cz':
QasmGateStatement(qasm_gate='cz',
cirq_gate=ops.CZ,
num_params=0,
num_args=2),
'ch':
QasmGateStatement(qasm_gate='ch',
cirq_gate=ops.ControlledGate(ops.H),
num_params=0,
num_args=2),
'swap':
QasmGateStatement(qasm_gate='swap',
cirq_gate=ops.SWAP,
num_params=0,
num_args=2),
'cswap':
QasmGateStatement(qasm_gate='cswap',
num_params=0,
num_args=3,
cirq_gate=ops.CSWAP),
'ccx':
QasmGateStatement(qasm_gate='ccx',
num_params=0,
num_args=3,
cirq_gate=ops.CCX),
'sdg':
QasmGateStatement(qasm_gate='sdg',
num_params=0,
num_args=1,
cirq_gate=ops.S**-1),
'tdg':
QasmGateStatement(qasm_gate='tdg',
num_params=0,
num_args=1,
cirq_gate=ops.T**-1),
}
all_gates = {**basic_gates, **qelib_gates}
tokens = QasmLexer.tokens
start = 'start'
precedence = (
('left', '+', '-'),
('left', '*', '/'),
('right', '^'),
)
def p_start(self, p):
"""start : qasm"""
p[0] = p[1]
def p_qasm_format_only(self, p):
"""qasm : format"""
self.supported_format = True
p[0] = Qasm(self.supported_format, self.qelibinc, self.qregs,
self.cregs, self.circuit)
def p_qasm_no_format_specified_error(self, p):
"""qasm : QELIBINC
| circuit """
if self.supported_format is False:
raise QasmException("Missing 'OPENQASM 2.0;' statement")
def p_qasm_include(self, p):
"""qasm : qasm QELIBINC"""
self.qelibinc = True
p[0] = Qasm(self.supported_format, self.qelibinc, self.qregs,
self.cregs, self.circuit)
def p_qasm_circuit(self, p):
"""qasm : qasm circuit"""
p[0] = Qasm(self.supported_format, self.qelibinc, self.qregs,
self.cregs, p[2])
def p_format(self, p):
"""format : FORMAT_SPEC"""
if p[1] != "2.0":
raise QasmException(
"Unsupported OpenQASM version: {}, "
"only 2.0 is supported currently by Cirq".format(p[1]))
# circuit : new_reg circuit
# | gate_op circuit
# | measurement circuit
# | empty
def p_circuit_reg(self, p):
"""circuit : new_reg circuit"""
p[0] = self.circuit
def p_circuit_gate_or_measurement(self, p):
"""circuit : circuit gate_op
| circuit measurement"""
self.circuit.append(p[2])
p[0] = self.circuit
def p_circuit_empty(self, p):
"""circuit : empty"""
p[0] = self.circuit
# qreg and creg
def p_new_reg(self, p):
"""new_reg : QREG ID '[' NATURAL_NUMBER ']' ';'
| CREG ID '[' NATURAL_NUMBER ']' ';'"""
name, length = p[2], p[4]
if name in self.qregs.keys() or name in self.cregs.keys():
raise QasmException("{} is already defined "
"at line {}".format(name, p.lineno(2)))
if length == 0:
raise QasmException("Illegal, zero-length register '{}' "
"at line {}".format(name, p.lineno(4)))
if p[1] == "qreg":
self.qregs[name] = length
else:
self.cregs[name] = length
p[0] = (name, length)
# gate operations
# gate_op : ID qargs
# | ID ( params ) qargs
def p_gate_op_no_params(self, p):
"""gate_op : ID qargs"""
self._resolve_gate_operation(p[2], gate=p[1], p=p, params=[])
def p_gate_op_with_params(self, p):
"""gate_op : ID '(' params ')' qargs"""
self._resolve_gate_operation(args=p[5], gate=p[1], p=p, params=p[3])
def _resolve_gate_operation(self, args: List[List[ops.Qid]], gate: str,
p: Any, params: List[float]):
gate_set = (self.basic_gates if not self.qelibinc else self.all_gates)
if gate not in gate_set.keys():
msg = 'Unknown gate "{}" at line {}{}'.format(
gate, p.lineno(1), ", did you forget to include qelib1.inc?"
if not self.qelibinc else "")
raise QasmException(msg)
p[0] = gate_set[gate].on(args=args, params=params, lineno=p.lineno(1))
# params : parameter ',' params
# | parameter
def p_params_multiple(self, p):
"""params : expr ',' params"""
p[3].insert(0, p[1])
p[0] = p[3]
def p_params_single(self, p):
"""params : expr """
p[0] = [p[1]]
# expr : term
# | func '(' expression ')' """
# | binary_op
# | unary_op
def p_expr_term(self, p):
"""expr : term"""
p[0] = p[1]
def p_expr_parens(self, p):
"""expr : '(' expr ')'"""
p[0] = p[2]
def p_expr_function_call(self, p):
"""expr : ID '(' expr ')'"""
func = p[1]
if func not in self.functions.keys():
raise QasmException(
"Function not recognized: '{}' at line {}".format(
func, p.lineno(1)))
p[0] = self.functions[func](p[3])
def p_expr_unary(self, p):
"""expr : '-' expr
| '+' expr """
if p[1] == '-':
p[0] = -p[2]
else:
p[0] = p[2]
def p_expr_binary(self, p):
"""expr : expr '*' expr
| expr '/' expr
| expr '+' expr
| expr '-' expr
| expr '^' expr
"""
p[0] = self.binary_operators[p[2]](p[1], p[3])
def p_term(self, p):
"""term : NUMBER
| NATURAL_NUMBER
| PI """
p[0] = p[1]
# qargs : qarg ',' qargs
# | qarg ';'
def p_args_multiple(self, p):
"""qargs : qarg ',' qargs"""
p[3].insert(0, p[1])
p[0] = p[3]
def p_args_single(self, p):
"""qargs : qarg ';'"""
p[0] = [p[1]]
# qarg : ID
# | ID '[' NATURAL_NUMBER ']'
def p_quantum_arg_register(self, p):
"""qarg : ID """
reg = p[1]
if reg not in self.qregs.keys():
raise QasmException('Undefined quantum register "{}" '
'at line {}'.format(reg, p.lineno(1)))
qubits = []
for idx in range(self.qregs[reg]):
arg_name = self.make_name(idx, reg)
if arg_name not in self.qubits.keys():
self.qubits[arg_name] = NamedQubit(arg_name)
qubits.append(self.qubits[arg_name])
p[0] = qubits
# carg : ID
# | ID '[' NATURAL_NUMBER ']'
def p_classical_arg_register(self, p):
"""carg : ID """
reg = p[1]
if reg not in self.cregs.keys():
raise QasmException('Undefined classical register "{}" '
'at line {}'.format(reg, p.lineno(1)))
p[0] = [self.make_name(idx, reg) for idx in range(self.cregs[reg])]
def make_name(self, idx, reg):
return str(reg) + "_" + str(idx)
def p_quantum_arg_bit(self, p):
"""qarg : ID '[' NATURAL_NUMBER ']' """
reg = p[1]
idx = p[3]
arg_name = self.make_name(idx, reg)
if reg not in self.qregs.keys():
raise QasmException('Undefined quantum register "{}" '
'at line {}'.format(reg, p.lineno(1)))
size = self.qregs[reg]
if idx >= size:
raise QasmException('Out of bounds qubit index {} '
'on register {} of size {} '
'at line {}'.format(idx, reg, size,
p.lineno(1)))
if arg_name not in self.qubits.keys():
self.qubits[arg_name] = NamedQubit(arg_name)
p[0] = [self.qubits[arg_name]]
def p_classical_arg_bit(self, p):
"""carg : ID '[' NATURAL_NUMBER ']' """
reg = p[1]
idx = p[3]
arg_name = self.make_name(idx, reg)
if reg not in self.cregs.keys():
raise QasmException('Undefined classical register "{}" '
'at line {}'.format(reg, p.lineno(1)))
size = self.cregs[reg]
if idx >= size:
raise QasmException('Out of bounds bit index {} '
'on classical register {} of size {} '
'at line {}'.format(idx, reg, size,
p.lineno(1)))
p[0] = [arg_name]
# measurement operations
# measurement : MEASURE qarg ARROW carg
def p_measurement(self, p):
"""measurement : MEASURE qarg ARROW carg ';'"""
qreg = p[2]
creg = p[4]
if len(qreg) != len(creg):
raise QasmException(
'mismatched register sizes {} -> {} for measurement '
'at line {}'.format(len(qreg), len(creg), p.lineno(1)))
p[0] = [
ops.MeasurementGate(num_qubits=1, key=creg[i]).on(qreg[i])
for i in range(len(qreg))
]
def p_error(self, p):
if p is None:
raise QasmException('Unexpected end of file')
raise QasmException("""Syntax error: '{}'
{}
at line {}, column {}""".format(p.value, self.debug_context(p), p.lineno,
self.find_column(p)))
def find_column(self, p):
line_start = self.qasm.rfind('\n', 0, p.lexpos) + 1
return (p.lexpos - line_start) + 1
def p_empty(self, p):
"""empty :"""
def parse(self, qasm: str) -> Qasm:
if self.parsedQasm is None:
self.qasm = qasm
self.lexer.input(self.qasm)
self.parsedQasm = self.parser.parse(lexer=self.lexer)
return self.parsedQasm
def debug_context(self, p):
debug_start = max(self.qasm.rfind('\n', 0, p.lexpos) + 1, p.lexpos - 5)
debug_end = min(self.qasm.find('\n', p.lexpos, p.lexpos + 5),
p.lexpos + 5)
return "..." + self.qasm[debug_start:debug_end] + "\n" + (
" " * (3 + p.lexpos - debug_start)) + "^"
def generate_all_single_qubit_rotation_cell_makers() -> Iterator[CellMaker]:
# Fixed single qubit rotations.
yield _gate("H", ops.H)
yield _gate("X", ops.X)
yield _gate("Y", ops.Y)
yield _gate("Z", ops.Z)
yield _gate("X^½", ops.X**(1 / 2))
yield _gate("X^⅓", ops.X**(1 / 3))
yield _gate("X^¼", ops.X**(1 / 4))
yield _gate("X^⅛", ops.X**(1 / 8))
yield _gate("X^⅟₁₆", ops.X**(1 / 16))
yield _gate("X^⅟₃₂", ops.X**(1 / 32))
yield _gate("X^-½", ops.X**(-1 / 2))
yield _gate("X^-⅓", ops.X**(-1 / 3))
yield _gate("X^-¼", ops.X**(-1 / 4))
yield _gate("X^-⅛", ops.X**(-1 / 8))
yield _gate("X^-⅟₁₆", ops.X**(-1 / 16))
yield _gate("X^-⅟₃₂", ops.X**(-1 / 32))
yield _gate("Y^½", ops.Y**(1 / 2))
yield _gate("Y^⅓", ops.Y**(1 / 3))
yield _gate("Y^¼", ops.Y**(1 / 4))
yield _gate("Y^⅛", ops.Y**(1 / 8))
yield _gate("Y^⅟₁₆", ops.Y**(1 / 16))
yield _gate("Y^⅟₃₂", ops.Y**(1 / 32))
yield _gate("Y^-½", ops.Y**(-1 / 2))
yield _gate("Y^-⅓", ops.Y**(-1 / 3))
yield _gate("Y^-¼", ops.Y**(-1 / 4))
yield _gate("Y^-⅛", ops.Y**(-1 / 8))
yield _gate("Y^-⅟₁₆", ops.Y**(-1 / 16))
yield _gate("Y^-⅟₃₂", ops.Y**(-1 / 32))
yield _gate("Z^½", ops.Z**(1 / 2))
yield _gate("Z^⅓", ops.Z**(1 / 3))
yield _gate("Z^¼", ops.Z**(1 / 4))
yield _gate("Z^⅛", ops.Z**(1 / 8))
yield _gate("Z^⅟₁₆", ops.Z**(1 / 16))
yield _gate("Z^⅟₃₂", ops.Z**(1 / 32))
yield _gate("Z^⅟₆₄", ops.Z**(1 / 64))
yield _gate("Z^⅟₁₂₈", ops.Z**(1 / 128))
yield _gate("Z^-½", ops.Z**(-1 / 2))
yield _gate("Z^-⅓", ops.Z**(-1 / 3))
yield _gate("Z^-¼", ops.Z**(-1 / 4))
yield _gate("Z^-⅛", ops.Z**(-1 / 8))
yield _gate("Z^-⅟₁₆", ops.Z**(-1 / 16))
# Dynamic single qubit rotations.
yield _gate("X^t", ops.X**sympy.Symbol('t'))
yield _gate("Y^t", ops.Y**sympy.Symbol('t'))
yield _gate("Z^t", ops.Z**sympy.Symbol('t'))
yield _gate("X^-t", ops.X**-sympy.Symbol('t'))
yield _gate("Y^-t", ops.Y**-sympy.Symbol('t'))
yield _gate("Z^-t", ops.Z**-sympy.Symbol('t'))
yield _gate("e^iXt", ops.Rx(2 * sympy.pi * sympy.Symbol('t')))
yield _gate("e^iYt", ops.Ry(2 * sympy.pi * sympy.Symbol('t')))
yield _gate("e^iZt", ops.Rz(2 * sympy.pi * sympy.Symbol('t')))
yield _gate("e^-iXt", ops.Rx(-2 * sympy.pi * sympy.Symbol('t')))
yield _gate("e^-iYt", ops.Ry(-2 * sympy.pi * sympy.Symbol('t')))
yield _gate("e^-iZt", ops.Rz(-2 * sympy.pi * sympy.Symbol('t')))
# Formulaic single qubit rotations.
yield _formula_gate("X^ft", "sin(pi*t)", lambda e: ops.X**e)
yield _formula_gate("Y^ft", "sin(pi*t)", lambda e: ops.Y**e)
yield _formula_gate("Z^ft", "sin(pi*t)", lambda e: ops.Z**e)
yield _formula_gate("Rxft", "pi*t*t", ops.Rx)
yield _formula_gate("Ryft", "pi*t*t", ops.Ry)
yield _formula_gate("Rzft", "pi*t*t", ops.Rz)