def get_instrs_fix_NaN(is_dp, fp_reg, isARM, reinit=False):
instrs = []
if is_dp:
regs = range(12)
ra = random.choice(regs)
regs.remove(ra)
rb = random.choice(regs)
instrs.append(('vcmp.f64', 'd%d, 0' % fp_reg))
instrs.append(('vmrs', 'apsr_nzcv, fpscr'))
if not isARM:
instrs.append(('itttt', 'vs'))
instrs.append(('vmovvs', 'r%d, r%d, d%d' % (ra, rb, fp_reg)))
#instrs.append(('orrvs', 'r1, r1, #0x80000000'))
if reinit:
instrs.append(('ldrvs', 'r%d, =0x%x' % (ra, code.getRandRegVal())))
instrs.append(('ldrvs', 'r%d, =0x%x' % (rb, code.getRandRegVal())))
else:
instrs.append(('mvnvs', 'r%d, #0' % ra))
instrs.append(('mvnvs', 'r%d, #0' % rb))
instrs.append(('vmovvs', 'd%d, r%d, r%d' % (fp_reg, ra, rb)))
else:
regs = range(12)
ra = random.choice(regs)
instrs.append(('vcmp.f32', 's%d, 0' % fp_reg))
instrs.append(('vmrs', 'apsr_nzcv, fpscr'))
if not isARM:
instrs.append(('ittt', 'vs'))
instrs.append(('vmovvs', 'r%d, s%d' % (ra, fp_reg)))
#instrs.append(('orrvs', 'r1, r1, #0x80000000'))
if reinit:
instrs.append(('ldrvs', 'r%d, =0x%x' % (ra, code.getRandRegVal())))
else:
instrs.append(('mvnvs', 'r%d, #0' % ra))
instrs.append(('vmovvs', 's%d, r%d' % (fp_reg, ra)))
#return [Instr(i[0], i[1]) for i in instrs]
return instrs
def genSTREX(isARM, ctx, isconditional, selfLabelPrefix, ExclSize=None, cond=None):
esinst = []
if ExclSize is None:
esinst.append(('clrex', ''))
return esinst
if isconditional:
if cond is None:
cond = random.choice(arminfo.CONDCODE)
else:
cond = ''
if isARM:
wsize_suffix = ''
else:
wsize_suffix = '.w'
reglist = range(15)
if not isARM:
reglist.remove(13)
rs = random.choice(reglist)
esinst.append(('mrs', 'r%d, APSR' % (rs)))
reglist.remove(rs)
rw = random.choice(reglist)
reglist.remove(rw)
rn = random.choice(reglist)
reglist.remove(rn)
rv = random.choice(reglist)
esinst.append(('ldr'+wsize_suffix, 'r%d, =excladdr+0' % (rw)))
esinst.append(('ldr'+wsize_suffix, 'r%d, [r%d]' % (rn, rw)))
esinst.append(('cmp'+wsize_suffix, 'r%d, #0' % (rn)))
esinst.append(('beq'+wsize_suffix, selfLabelPrefix+'_excl_stub'))
esinst.append(('mov'+wsize_suffix, 'r%d, #0' % (rv)))
esinst.append(('str'+wsize_suffix, 'r%d, [r%d]' % (rv, rw)))
esinst.append(('msr', 'APSR_nzcvqg, r%d' % (rs)))
imm_offset = random.choice([True, False])
if not isARM and imm_offset and ExclSize == 'w':
imm = ( random.randint(0x0, 0xff) << 2 )
esinst.append(('sub'+wsize_suffix, 'r%d, r%d, #0x%x' % (rn, rn, imm)))
reglist = range(15)
rt = random.choice(reglist)
if isARM:
if ExclSize == 'd':
regtmp = reglist
regtmp.remove(14)
regtmp = [i for i in regtmp if i&1==0]
rt = random.choice(regtmp)
else:
reglist.remove(13)
rt = random.choice(reglist)
reglist.remove(rt)
if isARM:
rt2 = rt + 1
else:
rt2 = random.choice(reglist)
if rt2 in reglist:
reglist.remove(rt2)
if rn in reglist:
reglist.remove(rn)
rd = random.choice(reglist)
esinst.append(('mov'+wsize_suffix, 'r%d, #0' % (rd)))
if cond != '':
uncond = arminfo.INVCONDCODE[arminfo.CONDCODE.index(cond)]
if not isARM:
esinst.append(('ite', cond))
if ExclSize == 'b':
esinst.append(('strexb'+cond, 'r%d, r%d, [r%d]' % (rd, rt, rn)))
elif ExclSize == 'h':
esinst.append(('strexh'+cond, 'r%d, r%d, [r%d]' % (rd, rt, rn)))
elif ExclSize == 'w':
if isARM or not imm_offset:
esinst.append(('strex'+cond, 'r%d, r%d, [r%d]' % (rd, rt, rn)))
else:
esinst.append(('strex'+cond, 'r%d, r%d, [r%d , #%d]' % (rd, rt, rn, imm)))
elif ExclSize == 'd':
esinst.append(('strexd'+cond, 'r%d, r%d, r%d, [r%d]' % (rd, rt, rt2, rn)))
else:
pass
if cond != '':
esinst.append(('b'+uncond, selfLabelPrefix+'_excl_fill_lock_mem'))
esinst.append(('cmp'+wsize_suffix, 'r%d, #0' % (rd)))
reglist = range(15)
if rn in reglist:
reglist.remove(rn)
rz1 = random.choice(reglist)
reglist.remove(rz1)
rz2 = random.choice(reglist)
reglist.remove(rz2)
esinst.append(('ldr'+wsize_suffix, 'r%d, =exclcnt+0' % (rz1)))
esinst.append(('ldr'+wsize_suffix, 'r%d, [r%d]' % (rz2, rz1)))
esinst.append(('sub'+wsize_suffix, 'r%d, r%d, #0x%x' % (rz2, rz2, 1)))
esinst.append(('str'+wsize_suffix, 'r%d, [r%d]' % (rz2, rz1)))
if not isARM:
esinst.append(('it', 'ne'))
esinst.append(('cmp'+'ne'+wsize_suffix, 'r%d, #0' % (rz2)))
esinst.append(('bne', selfLabelPrefix+'_excl_back_edge'))
esinst.append((selfLabelPrefix+'_excl_fill_lock_mem', ':'))
if not isARM and imm_offset and ExclSize == 'w':
esinst.append(('add'+wsize_suffix, 'r%d, r%d, #0x%x' % (rn, rn, imm)))
reg_lm = range(13)
if rt in reg_lm:
reg_lm.remove(rt)
if (ExclSize == 'd') and (rt2 in reg_lm):
reg_lm.remove(rt2)
if not (rn in reg_lm):
rm = random.choice(reg_lm)
esinst.append(('mov'+wsize_suffix, 'r%d, r%d' % (rm, rn)))
rn = rm
esinst.append(('ldr'+wsize_suffix, 'r%d, =0x%x' % (rt, code.getRandRegVal(rt))))
if ExclSize == 'd':
esinst.append(('ldr'+wsize_suffix, 'r%d, =0x%x' % (rt2, code.getRandRegVal(rt2))))
esinst.append(('strd'+wsize_suffix, 'r%d, r%d, [r%d, #0]' % (rt, rt2, rn)))
else:
esinst.append(('str'+wsize_suffix, 'r%d, [r%d]' % (rt, rn)))
esinst.append((selfLabelPrefix+'_excl_stub', ':'))
esinst.append(('ldr'+wsize_suffix, 'r%d, =0x%x' % (rs, code.getRandRegVal(rs))))
esinst.append(('ldr'+wsize_suffix, 'r%d, =0x%x' % (rn, code.getRandRegVal(rn))))
esinst.append(('mov'+wsize_suffix, 'r%d, #0' % (rd)))
esinst.append(('cmp'+wsize_suffix, 'r%d, #0' % (rd)))
esinst.append(('ldr'+wsize_suffix, 'r%d, =exclcnt+0' % (rz1)))
esinst.append(('ldr'+wsize_suffix, 'r%d, =0x%x' % (rz2, arminfo.EXCL_CNT)))
esinst.append(('str'+wsize_suffix, 'r%d, [r%d]' % (rz2, rz1)))
return esinst
def genLDREX(isARM, ctx, isconditional, selfLabelPrefix, ExclSize=None, cond=None):
elinst = []
if isconditional:
if cond is None:
cond = random.choice(arminfo.CONDCODE)
else:
cond = ''
if isARM:
wsize_suffix = ''
else:
wsize_suffix = '.w'
m_lo, m_hi = getMemLimit()
rval = random.randint(m_lo, m_hi)
if ExclSize is None:
ExclSize = random.choice(arminfo.OP_SIZE)
if ExclSize == 'h':
rval = rval >> 1 << 1
elif ExclSize == 'w':
rval = rval >> 2 << 2
elif ExclSize == 'd':
rval = rval >> 3 << 3
reglist = range(15)
rn = random.choice(reglist)
if isARM:
if ExclSize == 'd':
reglist.remove(14)
reglist = [i for i in reglist if i&1==0]
else:
reglist.remove(13)
rt = random.choice(reglist)
if 13 in reglist:
reglist.remove(13)
rp = random.choice(reglist)
reglist.remove(rp)
rq = random.choice(reglist)
elinst.append(('mrs', 'r%d, APSR' % (rp)))
elinst.append(('ldr'+wsize_suffix, 'r%d, =exclflag+0' % (rq)))
elinst.append(('str'+wsize_suffix, 'r%d, [r%d]' % (rp, rq)))
elinst.append((selfLabelPrefix+'_excl_back_edge', ':'))
elinst.append(('ldr'+wsize_suffix, 'r%d, =exclflag+0' % (rq)))
elinst.append(('ldr'+wsize_suffix, 'r%d, [r%d]' % (rp, rq)))
elinst.append(('msr', 'APSR_nzcvqg, r%d' % (rp)))
if isARM:
elinst.append(('ldr'+cond, 'r%d, =0x%x' % (rn, rval)))
else:
if cond != '':
elinst.append(('itttt', cond))
imm_offset = random.choice([True, False])
if ExclSize == 'w' and imm_offset:
imm = ( random.randint(0x0, 0xff) << 2 )
elinst.append(('ldr'+cond+wsize_suffix, 'r%d, =0x%x' % (rn, rval - imm)))
else:
elinst.append(('ldr'+cond+wsize_suffix, 'r%d, =0x%x' % (rn, rval)))
if ExclSize == 'b':
elinst.append(('ldrexb'+cond, 'r%d, [r%d]' % (rt, rn)))
elif ExclSize == 'h':
elinst.append(('ldrexh'+cond, 'r%d, [r%d]' % (rt, rn)))
elif ExclSize == 'w':
if isARM or not imm_offset:
elinst.append(('ldrex'+cond, 'r%d, [r%d]' % (rt, rn)))
else:
elinst.append(('ldrex'+cond, 'r%d, [r%d, #%d]' % (rt, rn, imm)))
elif ExclSize == 'd':
if isARM:
rt2 = rt + 1
else:
if rt in reglist:
reglist.remove(rt)
rt2 = random.choice(reglist)
elinst.append(('ldrexd'+cond, 'r%d, r%d, [r%d]' % (rt, rt2, rn)))
else:
pass
regtmp = range(13)
rx = random.choice(regtmp)
regtmp.remove(rx)
ry = random.choice(regtmp)
elinst.append(('ldr'+cond+wsize_suffix, 'r%d, =excladdr+0' % (rx)))
elinst.append(('ldr'+cond+wsize_suffix, 'r%d, =0x%x' % (ry, rval)))
if not isARM and cond != '':
if ExclSize == 'd':
elinst.append(('ittt', cond))
else:
elinst.append(('itt', cond))
elinst.append(('str'+cond+wsize_suffix, 'r%d, [r%d]' % (ry, rx)))
elinst.append(('ldr'+cond+wsize_suffix, 'r%d, =0x%x' % (rt, code.getRandRegVal(rt))))
if ExclSize == 'd':
elinst.append(('ldr'+cond+wsize_suffix, 'r%d, =0x%x' % (rt2, code.getRandRegVal(rt2))))
return (elinst, ExclSize)
