def _synthesize_prologue(self):
"""
Setup register 0.
"""
# Reserve register r0 for the value zero
# TODO - technically this is not needed, system sets all regs to 0
self._prologue = [self.lbl_prologue, spu.il(self.r_zero, 0, ignore_active=True), spu.lnop(ignore_active=True)]
return
def _synthesize_prologue(self):
"""
Setup register 0.
"""
self._prologue = [self.lbl_prologue]
# Reserve register r0 for the value zero
self._prologue.append(spu.il(self.r_zero, 0, ignore_active=True))
self._prologue.append(spu.lnop(ignore_active=True))
return
def _synthesize_prologue(self):
"""
Setup register 0.
"""
# Reserve register r0 for the value zero
# TODO - technically this is not needed, system sets all regs to 0
self._prologue = [self.lbl_prologue,
spu.il(self.r_zero, 0, ignore_active = True),
spu.lnop(ignore_active = True)]
return
def load_word(code, r_target, word, clear=False, zero=True):
"""If r0 is not set to 0, the zero parameter should be set to False"""
if zero and (-512 < word < 511):
code.add(spu.ai(r_target, code.r_zero, word))
elif (word & 0x7FFF) == word:
code.add(spu.il(r_target, word))
elif (word & 0x3FFFF) == word:
code.add(spu.ila(r_target, word))
else:
code.add(spu.ilhu(r_target, (word & 0xFFFF0000) >> 16))
code.add(spu.iohl(r_target, (word & 0xFFFF)))
if clear:
code.add(spu.shlqbyi(r_target, r_target, 12))
return
reg = dma.spu_read_in_mbox(code)
spu.ai(r_sum, r_sum, 1)
dma.spu_write_out_intr_mbox(code, r_sum)
#dma.spu_write_out_mbox(code, reg)
prgm.release_register(reg)
spu.ai(r_cnt, r_cnt, -1)
spu.brnz(r_cnt, lbl_loop)
reg = dma.spu_read_signal1(code)
spu.ori(code.gp_return, reg, 0)
spu.il(r_cnt, 0)
spu.il(r_sum, 16 * 4)
r_data = prgm.acquire_register()
r_cmp = prgm.acquire_register()
r_lsa = prgm.acquire_register()
spu.il(r_lsa, 0x1000)
lbl_incloop = prgm.get_label("incloop")
code.add(lbl_incloop)
spu.lqx(r_data, r_cnt, r_lsa)
spu.ai(r_data, r_data, 2)
spu.stqx(r_data, r_cnt, r_lsa)
reg = dma.spu_read_in_mbox(code)
spu.ai(r_sum, r_sum, 1)
dma.spu_write_out_intr_mbox(code, r_sum)
#dma.spu_write_out_mbox(code, reg)
prgm.release_register(reg)
spu.ai(r_cnt, r_cnt, -1)
spu.brnz(r_cnt, lbl_loop)
reg = dma.spu_read_signal1(code)
spu.ori(code.gp_return, reg, 0)
spu.il(r_cnt, 0)
spu.il(r_sum, 16 * 4)
r_data = prgm.acquire_register()
r_cmp = prgm.acquire_register()
r_lsa = prgm.acquire_register()
spu.il(r_lsa, 0x1000)
lbl_incloop = prgm.get_label("incloop")
code.add(lbl_incloop)
spu.lqx(r_data, r_cnt, r_lsa)
spu.ai(r_data, r_data, 2)
spu.stqx(r_data, r_cnt, r_lsa)
import corepy.arch.spu.isa as spu import corepy.arch.spu.lib.util as util import corepy.arch.spu.platform as env prgm = env.Program() code = prgm.get_stream() proc = env.Processor() # Generate substream # Multiply gp_return by 2, add 1 subcode = prgm.get_stream() subcode.add(spu.shli(subcode.gp_return, subcode.gp_return, 1)) subcode.add(spu.ai(subcode.gp_return, subcode.gp_return, 1)) # Initialize gp_return, insert code code.add(spu.il(code.gp_return, 5)) code.add(subcode) # Add 3, insert again code.add(spu.ai(code.gp_return, code.gp_return, 3)) code.add(subcode) #code.print_code() prgm.add(code) prgm.print_code() # TODO - support print prgm instead? ret = proc.execute(prgm, mode = 'int') print "ret", ret prgm = env.Program()
b = extarray.extarray('i', [0 for i in range(0, 32)])
prgm = env.Program()
code = prgm.get_stream()
proc = env.Processor()
spu.set_active_code(code)
r_lsa = prgm.acquire_register() # Local Store address
r_mma = prgm.acquire_register() # Main Memory address
r_size = prgm.acquire_register() # Size in bytes
r_tag = prgm.acquire_register() # DMA Tag
# Set the parameters for a GET command
abi = a.buffer_info()
spu.il(r_lsa, 0x1000) # Local Store address 0x1000
load_word(code, r_mma, abi[0]) # Main Memory address of array a
spu.il(r_size, a.itemsize * abi[1]) # Size of array a in bytes
spu.il(r_tag, 12) # DMA tag 12
# Issue a DMA GET command
dma.mfc_get(code, r_lsa, r_mma, r_size, r_tag)
# Wait for completion
# Set the completion mask; here we complete tag 12
spu.il(r_tag, 1 << 12)
dma.mfc_write_tag_mask(code, r_tag)
dma.mfc_read_tag_status_all(code)
# Set the parameters for a PUT command
bbi = b.buffer_info()
import corepy.arch.spu.isa as spu import corepy.arch.spu.lib.util as util import corepy.arch.spu.platform as env prgm = env.Program() code = prgm.get_stream() proc = env.Processor() # Generate substream # Multiply gp_return by 2, add 1 subcode = prgm.get_stream() subcode.add(spu.shli(subcode.gp_return, subcode.gp_return, 1)) subcode.add(spu.ai(subcode.gp_return, subcode.gp_return, 1)) # Initialize gp_return, insert code code.add(spu.il(code.gp_return, 5)) code.add(subcode) # Add 3, insert again code.add(spu.ai(code.gp_return, code.gp_return, 3)) code.add(subcode) #code.print_code() prgm.add(code) prgm.print_code() # TODO - support print prgm instead? ret = proc.execute(prgm, mode='int') print "ret", ret prgm = env.Program()
def Update(self):
self.reg_frame.Update()
self.ls_frame.Update()
self.mem_frame.Update()
return
if __name__ == '__main__':
prgm = env.Program()
code = prgm.get_stream()
reg = prgm.acquire_register()
foo = prgm.acquire_register(reg_name=5)
code.add(prgm.get_label("FOO"))
code.add(spu.il(foo, 0xCAFE))
code.add(spu.ilhu(reg, 0xDEAD))
code.add(spu.iohl(reg, 0xBEEF))
code.add(spu.stqd(reg, code.r_zero, 4))
lbl_loop = prgm.get_label("LOOP")
lbl_break = prgm.get_label("BREAK")
r_cnt = code.gp_return
r_stop = prgm.acquire_register(reg_name=9)
r_cmp = prgm.acquire_register()
code.add(spu.ori(r_cnt, code.r_zero, 0))
code.add(spu.il(r_stop, 5))
code.add(lbl_loop)
return fcode
if __name__ == '__main__':
import corepy.lib.printer as printer
import corepy.arch.spu.lib.util as util
prgm = env.Program()
code = prgm.get_stream()
spu.set_active_code(code)
r_cnt = prgm.acquire_register()
r_cmp = prgm.acquire_register()
r_sum = prgm.acquire_register()
spu.il(r_cnt, 32)
spu.il(r_sum, 0)
lbl_loop = prgm.get_unique_label("LOOP")
code.add(lbl_loop)
spu.ai(r_sum, r_sum, 1)
spu.ceqi(r_cmp, r_cnt, 2)
spu.brz(r_cmp, lbl_loop)
spu.ai(r_sum, r_sum, 10)
#src = prgm.acquire_register()
#tmp = prgm.acquire_registers(3)
#dst = prgm.acquire_registers(2)
if __name__ == '__main__':
import corepy.lib.printer as printer
import corepy.arch.spu.lib.util as util
prgm = env.Program()
code = prgm.get_stream()
spu.set_active_code(code)
r_cnt = prgm.acquire_register()
r_cmp = prgm.acquire_register()
r_sum = prgm.acquire_register()
spu.il(r_cnt, 32)
spu.il(r_sum, 0)
lbl_loop = prgm.get_unique_label("LOOP")
code.add(lbl_loop)
spu.ai(r_sum, r_sum, 1)
spu.ceqi(r_cmp, r_cnt, 2)
spu.brz(r_cmp, lbl_loop)
spu.ai(r_sum, r_sum, 10)
#src = prgm.acquire_register()
#tmp = prgm.acquire_registers(3)
#dst = prgm.acquire_registers(2)
b = extarray.extarray('i', [0 for i in range(0, 32)])
prgm = env.Program()
code = prgm.get_stream()
proc = env.Processor()
spu.set_active_code(code)
r_lsa = prgm.acquire_register() # Local Store address
r_mma = prgm.acquire_register() # Main Memory address
r_size = prgm.acquire_register() # Size in bytes
r_tag = prgm.acquire_register() # DMA Tag
# Set the parameters for a GET command
abi = a.buffer_info()
spu.il(r_lsa, 0x1000) # Local Store address 0x1000
load_word(code, r_mma, abi[0]) # Main Memory address of array a
spu.il(r_size, a.itemsize * abi[1]) # Size of array a in bytes
spu.il(r_tag, 12) # DMA tag 12
# Issue a DMA GET command
dma.mfc_get(code, r_lsa, r_mma, r_size, r_tag)
# Wait for completion
# Set the completion mask; here we complete tag 12
spu.il(r_tag, 1 << 12)
dma.mfc_write_tag_mask(code, r_tag)
dma.mfc_read_tag_status_all(code)
# Set the parameters for a PUT command
def Update(self):
self.reg_frame.Update()
self.ls_frame.Update()
self.mem_frame.Update()
return
if __name__=='__main__':
prgm = env.Program()
code = prgm.get_stream()
reg = prgm.acquire_register()
foo = prgm.acquire_register(reg_name = 5)
code.add(prgm.get_label("FOO"))
code.add(spu.il(foo, 0xCAFE))
code.add(spu.ilhu(reg, 0xDEAD))
code.add(spu.iohl(reg, 0xBEEF))
code.add(spu.stqd(reg, code.r_zero, 4))
lbl_loop = prgm.get_label("LOOP")
lbl_break = prgm.get_label("BREAK")
r_cnt = code.gp_return
r_stop = prgm.acquire_register(reg_name = 9)
r_cmp = prgm.acquire_register()
code.add(spu.ori(r_cnt, code.r_zero, 0))
code.add(spu.il(r_stop, 5))
code.add(lbl_loop)
