class TestLoadOpcodes(unittest.TestCase):
def setUp(self):
self.cpu = Cpu(MMU())
self.cpu.mmu.rom = [0] * 128
self.cpu.mmu.load('C:/Users/cjpowell/workspace/Python/gbpy/resources/test_file.gb')
def test_direct_load(self):
self.cpu.registers.b = 10
self.cpu._op_48()
self.assertEqual(self.cpu.registers.b, self.cpu.registers.c)
self.assertEqual(self.cpu.registers.c, 10)
def test_indirect_load_HL(self):
self.cpu.registers.h = 0x0
self.cpu.registers.l = 0x0
self.cpu._op_46()
self.assertEqual(self.cpu.registers.b, 0xff) # All GB roms will start with this reset op
def test_indirect_load_PC(self):
# Reads from memory at address stored in pc (next byte read)
self.cpu.registers.pc = 0x0
self.cpu._op_06()
self.assertEqual(self.cpu.registers.b, 0xff) # roms begin with 0xff and that is what we are at.
self.assertEqual(self.cpu.registers.pc, 0x01) # pc should increment, as we read next value for load
def test_indirect_load_inc(self):
self.cpu._op_22()
self.assertEqual(self.cpu.registers.a, 0xff)
self.assertEqual(self.cpu.registers.l, 1)
self.assertEqual(self.cpu.registers.h, 0)
self.cpu.registers.l = 0xff
self.cpu._op_22()
self.assertEqual(self.cpu.registers.l, 0)
self.assertEqual(self.cpu.registers.h, 1)
def test_indirect_load_dec(self):
self.cpu.registers.l = 1
self.cpu._op_32()
self.assertEqual(self.cpu.registers.a, 0)
self.assertEqual(self.cpu.registers.l, 0)
self.cpu._op_32()
self.assertEqual(self.cpu.registers.a, 0xff)
self.assertEqual(self.cpu.registers.l, 0xff)
self.assertEqual(self.cpu.registers.h, 0xff)