def generate_rigetti(self):
import pyquil
from pyquil.quil import Program
from pyquil.gates import H, RZ, RX, RY, CNOT, MEASURE, RESET
from pyquil.api import get_qc
self.rigetti_circuits_list=[]
print("Creating Pyquil program list...")
self.logfile.write("Creating Pyquil program list...")
for circuit in self.circuits_list:
p = pyquil.Program(RESET()) #compressed program
ro = p.declare('ro', memory_type='BIT', memory_size=self.num_qubits)
for gate in circuit.gates:
if gate.name in "H":
p.inst(pyquil.gates.H(gate.qubits[0]))
elif gate.name in "RZ":
p.inst(pyquil.gates.RZ(gate.angles[0],gate.qubits[0]))
elif gate.name in "RX":
p.inst(pyquil.gates.RX(gate.angles[0],gate.qubits[0]))
elif gate.name in "CNOT":
p.inst(pyquil.gates.CNOT(gate.qubits[0],gate.qubits[1]))
for i in range(self.num_qubits):
p.inst(pyquil.gates.MEASURE(i,ro[i]))
p.wrap_in_numshots_loop(self.shots)
self.rigetti_circuits_list.append(p)
if "y" in self.compile:
qc=get_qc(self.device_choice)
if self.JZ != 0 and self.JX==self.JY==0 and self.h_ext!=0 and self.ext_dir=="X" and self.auto_ds_compile=="y":
#TFIM
print("TFIM detected, enabling DS compiler")
self.logfile.write("TFIM detected, enabling DS compiler")
temp=[]
for circuit in self.rigetti_circuits_list:
temp.append(ds_compile(circuit,self.backend,self.shots))
self.rigetti_circuits_list=temp
elif self.default_compiler in "ds":
temp=[]
print("Compiling circuits...")
self.logfile.write("Compiling circuits...")
for circuit in self.rigetti_circuits_list:
temp.append(ds_compile(circuit,self.backend,self.shots))
self.rigetti_circuits_list=temp
print("Circuits compiled successfully")
self.logfile.write("Circuits compiled successfully")
elif self.default_compiler in "native":
temp=[]
print("Transpiling circuits...")
self.logfile.write("Transpiling circuits...")
for circuit in self.rigetti_circuits_list:
circ = qc.compile(circuit)
temp.append(circ)
self.rigetti_circuits_list=temp
print("Circuits transpiled successfully")
self.logfile.write("Circuits transpiled successfully")
print("Pyquil program list created successfully")
self.logfile.write("Pyquil program list created successfully")
def generate_ibm(self):
self.ibm_circuits_list = []
#convert from local circuits to IBM-specific circuit
#IBM imports
import qiskit as qk
from qiskit.tools.monitor import job_monitor
from qiskit.visualization import plot_histogram, plot_gate_map, plot_circuit_layout
from qiskit import Aer, IBMQ, execute
from qiskit.providers.aer import noise
from qiskit.providers.aer.noise import NoiseModel
from qiskit.circuit import quantumcircuit
from qiskit.circuit import Instruction
self.qr = qk.QuantumRegister(self.num_qubits, 'q')
self.cr = qk.ClassicalRegister(self.num_qubits, 'c')
if "y" in self.compile:
## Show available backends
provider = qk.IBMQ.get_provider(group='open')
provider.backends()
#choose the device you would like to run on
device = provider.get_backend(self.device_choice)
#gather fidelity statistics on this device if you want to create a noise model for the simulator
properties = device.properties()
coupling_map = device.configuration().coupling_map
#TO RUN ON THE SIMULATOR
#create a noise model to use for the qubits of the simulator
noise_model = NoiseModel.from_backend(device)
# Get the basis gates for the noise model
basis_gates = noise_model.basis_gates
# Select the QasmSimulator from the Aer provider
simulator = Aer.get_backend('qasm_simulator')
#To run on the quantum computer, assign a quantum computer of your choice as the backend
backend = provider.get_backend(self.device_choice)
print("Creating IBM quantum circuit objects...")
with open(self.namevar, 'a') as tempfile:
tempfile.write("Creating IBM quantum circuit objects...\n")
name = 0
for circuit in self.circuits_list:
propcirc = qk.QuantumCircuit(self.qr, self.cr)
index = 0
for flip in self.flip_vec:
if int(flip) == 1:
propcirc.x(self.qr[index])
index += 1
else:
index += 1
propcirc.barrier()
for gate in circuit.gates:
if "H" in gate.name:
propcirc.h(gate.qubits[0])
elif "RZ" in gate.name:
propcirc.rz(gate.angles[0], gate.qubits[0])
elif "RX" in gate.name:
propcirc.rx(gate.angles[0], gate.qubits[0])
elif "CNOT" in gate.name:
propcirc.cx(gate.qubits[0], gate.qubits[1])
propcirc.measure(self.qr, self.cr)
self.ibm_circuits_list.append(propcirc)
print("IBM quantum circuit objects created")
with open(self.namevar, 'a') as tempfile:
tempfile.write("IBM quantum circuit objects created\n")
if "y" in self.compile:
if self.JZ != 0 and self.JX == self.JY == 0 and self.h_ext != 0 and self.ext_dir == "X" and self.auto_smart_compile == "y":
#TFIM
print("TFIM detected, enabling DS compiler")
with open(self.namevar, 'a') as tempfile:
tempfile.write("TFIM detected, enabling DS compiler\n")
temp = []
for circuit in self.ibm_circuits_list:
compiled = ds_compile(circuit, self.backend)
temp.append(compiled)
self.ibm_circuits_list = temp
elif self.default_compiler in "ds":
temp = []
print("Compiling circuits...")
with open(self.namevar, 'a') as tempfile:
tempfile.write("Compiling circuits...\n")
for circuit in self.ibm_circuits_list:
compiled = ds_compile(circuit, self.backend)
temp.append(compiled)
self.ibm_circuits_list = temp
print("Circuits compiled successfully")
with open(self.namevar, 'a') as tempfile:
tempfile.write("Circuits compiled successfully\n")
elif self.default_compiler in "native":
print("Transpiling circuits...")
with open(self.namevar, 'a') as tempfile:
tempfile.write("Transpiling circuits...\n")
temp = qk.compiler.transpile(self.ibm_circuits_list,
backend=device,
optimization_level=3)
self.ibm_circuits_list = temp
print("Circuits transpiled successfully")
with open(self.namevar, 'a') as tempfile:
tempfile.write("Circuits transpiled successfully\n")