class Main(m.Circuit):
io = m.IO(a=m.In(m.Bit), b=m.In(m.Bit))
io += m.ClockIO(has_resetn=True)
f.assert_(io.a | f.implies | f.delay[2] | io.b,
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN))
f.assert_(f.sva(io.a, "|-> ##2", io.b),
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN))
class Main(m.Circuit):
io = m.IO(write=m.In(m.Bit), read=m.In(m.Bit)) + m.ClockIO()
if sva:
f.assert_(f.sva(io.write == 1, f"|-> s_eventually", io.read == 1),
on=f.posedge(io.CLK))
else:
f.assert_(
(io.write == 1) | f.implies | f.eventually | (io.read == 1),
on=f.posedge(io.CLK))
class Main(m.Circuit):
io = m.IO(I=m.In(m.Bits[8]), O=m.Out(m.Bits[8])) + m.ClockIO()
io.O @= m.Register(T=m.Bits[8])()(io.I)
if sva:
f.assert_(f.sva(io.I, "|-> ##1",
io.O.value() == 0),
on=f.posedge(io.CLK))
else:
f.assert_(io.I | f.implies | f.delay[1] | (io.O.value() == 0),
on=f.posedge(io.CLK))
class Main(m.Circuit):
io = m.IO(write=m.In(m.Bit), read=m.In(m.Bit)) + m.ClockIO()
if sva:
symb = num_reps
if isinstance(symb, slice):
symb = f"{symb.start}:{symb.stop}"
f.assert_(f.sva(io.write == 1, f"[-> {symb}]", '##1', io.read,
'##1', io.write),
on=f.posedge(io.CLK))
else:
f.assert_((io.write == 1) | f.goto[num_reps] | f.delay[1] | io.read
| f.delay[1] | io.write,
on=f.posedge(io.CLK))
class Foo(m.Circuit):
io = m.IO(valid=m.In(m.Bit),
sop=m.In(m.Bit),
eop=m.In(m.Bit),
ready=m.Out(m.Bit)) + m.ClockIO(has_resetn=True)
io.ready @= 1
if use_sva:
f.assert_(
f.sva(
f.not_(~(io.valid & io.ready.value() & io.eop)),
"throughout",
# Note: need sequence here to wrap parens
f.sequence(
f.sva((io.valid & io.ready.value() & io.sop),
"[-> 2]"))),
name="eop_must_happen_btn_two_sop_A",
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN))
f.assert_(f.sva(io.valid & io.ready.value() & io.eop, "##1",
~io.valid, "[*0:$] ##1", io.valid, "|->", io.sop),
name="first_valid_after_eop_must_have_sop_A",
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN))
else:
f.assert_(f.not_(~(io.valid & io.ready.value() & io.eop))
| f.throughout |
((io.valid & io.ready.value() & io.sop) | f.goto[2]),
name="eop_must_happen_btn_two_sop_A",
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN))
f.assert_((io.valid & io.ready.value() & io.eop) | f.delay[1] |
(~io.valid) | f.repeat[0:] | f.delay[1] |
(io.valid | f.implies | io.sop),
name="first_valid_after_eop_must_have_sop_A",
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN))
class Main(m.Circuit):
io = m.IO(a=m.In(m.Bit), b=m.In(m.Bit))
io += m.ClockIO(has_resetn=True)
f.assert_(io.a | f.implies | f.delay[2] | io.b,
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN),
compile_guard=compile_guard,
name="foo")
temp = m.Bit(name="temp")
temp @= io.a
f.assert_(f.sva(temp, "|-> ##2", io.b),
on=f.posedge(io.CLK),
disable_iff=f.not_(io.RESETN),
compile_guard=compile_guard,
name="bar")
class Main(m.Circuit):
io = m.IO(a=m.In(m.Bits[2])) + m.ClockIO()
if sva:
f.assert_(f.sva(io.a, "inside {0, 1}"), on=f.posedge(io.CLK))
else:
f.assert_(io.a | f.inside | {0, 1}, on=f.posedge(io.CLK))